From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D31C285CA4 for ; Mon, 27 Apr 2026 10:49:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777286966; cv=none; b=n0LZ6RdL3jVKwhwdhZwzeNw+1nFP4ia24xerW+DSYHUc5D8zCtrOQrj61e/BQkBacxQAmHuXEUbg0UcwIGFCNl8piiO2c7B1Efk54E4RpVQX5JiGbztIw3erlF4Xdnl03ZgdUSo+chQzXOVShzFWWFRXChjVfpI0rwbIeVhnKtw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777286966; c=relaxed/simple; bh=0r6xZrZ8YV9UqFGcqBBFQzvzctRg0aT3lOqXb7pDPwY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lptB9qF9Hsb+GRVWoECxbVyVAtUYDXL0KC3j0QTajND1kKWVWFJodMYbtfJmUovUx3GGqAsiWctDoGrWHZSelHNANKCHv8vz1043/kOrkUxFuCPCcwKpFIhHN/Mu+U7VCbgslPRnm8NWeUOMTuJN6qx0YlET5zJMTK/9Tz2t6XU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=inO8LOaz; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="inO8LOaz" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=OKQp9Yx/9Rvl8GakqhdXTO8YERBExsPUn/jaifH6kV4=; b=inO8LOazjzbcyLK+Das0bMG4D4 bi5irue13RRAnKfAqTQ0TOZ+gJyPeHP3y1SVrjqDcbWXDvHckgzGhx56i+GKnVMQMt0d5MbneqI+2 k+PQIcTUfg5Ca9/aMuHBca+rlCSUPyH1uHNkhQQCh/qZgmq2t/xE/F7PmJL1CJ81GFIdA80fVsI00 KtgpioVyIybWuYeqb2UDpmHM2rgMHS2f5+S3W03654a/BLtjPD+iJlfX+TIq8cNmZ4R4eVQb9TbPo jztvMWKsD3gAqONgx2ywcMfP6w+Y8y6abA4U4WGkUAdOXMhk9h7fN+arHvvQF6A0zGrYJfvUcvKMs TbQGeSDw==; From: Heiko Stuebner To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sandy Huang , Andy Yan , Cristian Ciocaltea Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Diederik de Haas , Maud Spierings Subject: Re: [PATCH v5 05/10] drm/bridge: dw-hdmi-qp: Add HDMI 2.0 SCDC scrambling and high TMDS clock ratio support Date: Mon, 27 Apr 2026 12:49:09 +0200 Message-ID: <3826043.PYKUYFuaPT@phil> In-Reply-To: <20260426-dw-hdmi-qp-scramb-v5-5-d778e70c317b@collabora.com> References: <20260426-dw-hdmi-qp-scramb-v5-0-d778e70c317b@collabora.com> <20260426-dw-hdmi-qp-scramb-v5-5-d778e70c317b@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Am Sonntag, 26. April 2026, 02:20:17 Mitteleurop=C3=A4ische Sommerzeit schr= ieb Cristian Ciocaltea: > Enable HDMI 2.0 display modes (e.g. 4K@60Hz) by adding SCDC management > for the high TMDS clock ratio and scrambling, required when the TMDS > character rate exceeds the 340 MHz HDMI 1.4b limit. >=20 > A periodic work item monitors the sink's scrambling status to recover > from sink-side resets. On hotplug detect, if SCDC scrambling state is > out of sync with the driver, trigger a CRTC reset to re-establish the > link. >=20 > Reject modes requiring TMDS rates above 600 MHz, as those fall in the > HDMI 2.1 FRL domain which is not supported. In no_hpd configurations, > further restrict to 340 MHz since SCDC requires a connected sink. >=20 > Tested-by: Diederik de Haas > Tested-by: Maud Spierings > Signed-off-by: Cristian Ciocaltea > --- > drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 188 +++++++++++++++++++++= +++--- > 1 file changed, 172 insertions(+), 16 deletions(-) >=20 > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c b/drivers/gpu/d= rm/bridge/synopsys/dw-hdmi-qp.c > index d649a1cf07f5..c482a8e7da25 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > @@ -2,6 +2,7 @@ > /* > * Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd. > * Copyright (c) 2024 Collabora Ltd. > + * Copyright (c) 2025 Amazon.com, Inc. or its affiliates. I have no real clue about the inner workings of hdmi, but that line does make me curious, because no part of the patch authorship does mention Amazon ;-) . Also I think "or it's affiliates" might be way too broad, because this can be essentially everyone. So noone in the future will know who to ask on copyright questions. Similarly when _somebody_ comes forward with "I hold a copyright on this" no-one could verify this claim as well. I somehow expect _one_ entity being specified, not possibly hundreds. Heiko