From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Jim Mattson <jmattson@google.com>
Cc: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Mingwei Zhang <mizhang@google.com>,
Xiong Zhang <xiong.y.zhang@intel.com>,
Zhenyu Wang <zhenyuw@linux.intel.com>,
Like Xu <like.xu.linux@gmail.com>,
Jinrong Liang <cloudliang@tencent.com>,
Dapeng Mi <dapeng1.mi@intel.com>
Subject: Re: [Patch v5 06/18] x86: pmu: Add asserts to warn inconsistent fixed events and counters
Date: Tue, 27 Aug 2024 08:41:19 +0800 [thread overview]
Message-ID: <38cf9a8f-97cb-41a4-aac2-4c9f61a90dd7@linux.intel.com> (raw)
In-Reply-To: <CALMp9eT2pc0qDaySuyNcHr5+tO4gfvrqmYo=a3Ay-0=rfhiksg@mail.gmail.com>
On 8/27/2024 2:36 AM, Jim Mattson wrote:
> On Sun, Aug 25, 2024 at 11:56 PM Mi, Dapeng <dapeng1.mi@linux.intel.com> wrote:
>>
>> On 8/23/2024 2:22 AM, Jim Mattson wrote:
>>> On Tue, Jul 2, 2024 at 7:12 PM Dapeng Mi <dapeng1.mi@linux.intel.com> wrote:
>>>> Current PMU code deosn't check whether PMU fixed counter number is
>>>> larger than pre-defined fixed events. If so, it would cause memory
>>>> access out of range.
>>>>
>>>> So add assert to warn this invalid case.
>>>>
>>>> Reviewed-by: Mingwei Zhang <mizhang@google.com>
>>>> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
>>>> ---
>>>> x86/pmu.c | 10 ++++++++--
>>>> 1 file changed, 8 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/x86/pmu.c b/x86/pmu.c
>>>> index b4de2680..3e0bf3a2 100644
>>>> --- a/x86/pmu.c
>>>> +++ b/x86/pmu.c
>>>> @@ -113,8 +113,12 @@ static struct pmu_event* get_counter_event(pmu_counter_t *cnt)
>>>> for (i = 0; i < gp_events_size; i++)
>>>> if (gp_events[i].unit_sel == (cnt->config & 0xffff))
>>>> return &gp_events[i];
>>>> - } else
>>>> - return &fixed_events[cnt->ctr - MSR_CORE_PERF_FIXED_CTR0];
>>>> + } else {
>>>> + unsigned int idx = cnt->ctr - MSR_CORE_PERF_FIXED_CTR0;
>>>> +
>>>> + assert(idx < ARRAY_SIZE(fixed_events));
>>> Won't this assertion result in a failure on bare metal, for CPUs
>>> supporting fixed counter 3?
>> Yes, this is intended use. Currently KVM vPMU still doesn't support fixed
>> counter 3. If it's supported in KVM vPMU one day but forget to add
>> corresponding support in this pmu test, this assert would remind this.
> These tests are supposed to run (and pass) on bare metal. Hence, they
> should not be dependent on a non-architectural quirk of the KVM
> implementation.
>
> Perhaps a warning would serve as a reminder?
Sounds reasonable. Would change to a warning. Thanks.
>
>>>> + return &fixed_events[idx];
>>>> + }
>>>>
>>>> return (void*)0;
>>>> }
>>>> @@ -740,6 +744,8 @@ int main(int ac, char **av)
>>>> printf("Fixed counters: %d\n", pmu.nr_fixed_counters);
>>>> printf("Fixed counter width: %d\n", pmu.fixed_counter_width);
>>>>
>>>> + assert(pmu.nr_fixed_counters <= ARRAY_SIZE(fixed_events));
>>>> +
>>> And this one as well?
>>>
>>>> apic_write(APIC_LVTPC, PMI_VECTOR);
>>>>
>>>> check_counters();
>>>> --
>>>> 2.40.1
>>>>
next prev parent reply other threads:[~2024-08-27 0:41 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-03 9:56 [Patch v5 00/18] pmu test bugs fix and improvements Dapeng Mi
2024-07-03 9:56 ` [Patch v5 01/18] x86: pmu: Remove duplicate code in pmu_init() Dapeng Mi
2024-07-03 9:56 ` [Patch v5 02/18] x86: pmu: Remove blank line and redundant space Dapeng Mi
2024-07-03 9:56 ` [Patch v5 03/18] x86: pmu: Refine fixed_events[] names Dapeng Mi
2024-07-03 9:56 ` [Patch v5 04/18] x86: pmu: Fix the issue that pmu_counter_t.config crosses cache line Dapeng Mi
2024-07-03 9:56 ` [Patch v5 05/18] x86: pmu: Enlarge cnt[] length to 48 in check_counters_many() Dapeng Mi
2024-07-03 9:57 ` [Patch v5 06/18] x86: pmu: Add asserts to warn inconsistent fixed events and counters Dapeng Mi
2024-08-22 18:22 ` Jim Mattson
2024-08-26 6:56 ` Mi, Dapeng
2024-08-26 18:36 ` Jim Mattson
2024-08-27 0:41 ` Mi, Dapeng [this message]
2024-07-03 9:57 ` [Patch v5 07/18] x86: pmu: Fix cycles event validation failure Dapeng Mi
2024-07-03 9:57 ` [Patch v5 08/18] x86: pmu: Use macro to replace hard-coded branches event index Dapeng Mi
2024-07-03 9:57 ` [Patch v5 09/18] x86: pmu: Use macro to replace hard-coded ref-cycles " Dapeng Mi
2024-07-03 9:57 ` [Patch v5 10/18] x86: pmu: Use macro to replace hard-coded instructions " Dapeng Mi
2024-07-03 9:57 ` [Patch v5 11/18] x86: pmu: Enable and disable PMCs in loop() asm blob Dapeng Mi
2024-07-03 9:57 ` [Patch v5 12/18] x86: pmu: Improve instruction and branches events verification Dapeng Mi
2024-07-04 8:02 ` Sandipan Das
2024-07-04 12:21 ` Mi, Dapeng
2024-07-03 9:57 ` [Patch v5 13/18] x86: pmu: Improve LLC misses event verification Dapeng Mi
2024-07-03 9:57 ` [Patch v5 14/18] x86: pmu: Adjust lower boundary of llc-misses event to 0 for legacy CPUs Dapeng Mi
2024-07-03 9:57 ` [Patch v5 15/18] x86: pmu: Add IBPB indirect jump asm blob Dapeng Mi
2024-07-03 9:57 ` [Patch v5 16/18] x86: pmu: Adjust lower boundary of branch-misses event Dapeng Mi
2024-07-03 9:57 ` [Patch v5 17/18] x86: pmu: Optimize emulated instruction validation Dapeng Mi
2024-07-03 9:57 ` [Patch v5 18/18] x86: pmu: Print measured event count if test fails Dapeng Mi
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