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Wed, 17 Jan 2024 04:30:35 -0800 (PST) Received: from [172.25.98.130] ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id gq26-20020a170906e25a00b00a2d5dc7f4c3sm4979968ejb.223.2024.01.17.04.30.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Jan 2024 04:30:34 -0800 (PST) Message-ID: <38dcb8cc-5d16-41f2-845b-5c97cb691cb7@gmail.com> Date: Wed, 17 Jan 2024 14:30:33 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 1/2] dt-bindings: adc: add AD7173 Content-Language: en-US To: David Lechner Cc: linus.walleij@linaro.org, brgl@bgdev.pl, andy@kernel.org, linux-gpio@vger.kernel.org, Lars-Peter Clausen , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Walle , Andy Shevchenko , Arnd Bergmann , ChiaEn Wu , Niklas Schnelle , =?UTF-8?Q?Leonard_G=C3=B6hrs?= , Mike Looijmans , Haibo Chen , Hugo Villeneuve , Ceclan Dumitru , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20231220104810.3179-1-mitrutzceclan@gmail.com> From: Ceclan Dumitru In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 1/15/24 23:53, David Lechner wrote: > On Wed, Dec 20, 2023 at 4:48 AM Dumitru Ceclan wrote: ... > > According to the timing diagram in the datasheet, SCLK is high during > idle, so don't we need `spi-cpol: true` here? > > Likewise, data is valid on the trailing SCLK edge, so don't we need > `spi-cpha: true` here? > > V1 Rob Herring suggested that if device is not configurable, driver should set the spi mode >> + gpio-controller: >> + description: Marks the device node as a GPIO controller. >> + >> + "#gpio-cells": >> + const: 2 >> + description: >> + The first cell is the GPIO number and the second cell specifies >> + GPIO flags, as defined in . >> + >> + refin-supply: >> + description: external reference supply, can be used as reference for conversion. > > If I'm understanding correctly, this represents both voltage inputs > REF+ and REF-, correct? The datasheet says "Reference Input Negative > Terminal. REF− can span from AVSS to AVDD1 − 1 V". It seems like they > should be separate supplies in case REF- is non-zero. Otherwise, how > can we know what voltage it is? (same comment applies to refin2.) > Yes, but in that case, the value of the referenced supply should reflect that and be equal to (REF+)-(REF-). I'll add to the description this. ... >> +required: >> + - compatible >> + - reg >> + - interrupts > > Why are interrupts required? What if the pin is not connected? > >From the datasheet, the reading of the conversions seem to be only interrupt based: "As soon as the next conversion is complete, the data register is updated; therefore, the period in which to read the conversion is limited." this paragraph suggests to me that interrupts are required