From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D026A227EA7 for ; Wed, 26 Nov 2025 20:00:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764187232; cv=none; b=fXkZeFp9xYzT1CcOTDaX4y76sUaOJ5Dg7+gUpARvYtOFssREcxKzlmDyqlS/+YP53fxD9G2ZSY14GUFmZX8B8nnqjmeBRJ49O8sqA9wN6DgJYquD2ZSWMP3Z6K8vM5z8TUbNVSLKVTUbe4jHOAnTUS0J1Ce5H3X3wUK4T0JXgxg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764187232; c=relaxed/simple; bh=R2AGU5XnORZusZ1iGFwJY7bQHmgaVS26nysHAWjHEZU=; h=Date:From:To:cc:Subject:In-Reply-To:Message-ID:References: MIME-Version:Content-Type; b=p4FETNiJNbvnPLBplT//78Fbgzs/MayVPBD6f3Z2prYyX0YpJMKSLk5AOQ7eSuGyY4c7Cbv5mICOTSlI1o9mu4SZauOtLkGZUi+WbPziDNAploWpXN9Q/WNSeZBvpyVojXL3PPtVMQyhFxhbj+dpSxP130o7xXEpE8fdkEUIM6A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OiC5469N; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OiC5469N" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 98B21C4CEF7; Wed, 26 Nov 2025 20:00:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1764187232; bh=R2AGU5XnORZusZ1iGFwJY7bQHmgaVS26nysHAWjHEZU=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=OiC5469NkF4URpfQxVhISBbvN9Wlj4COaxPmDOmpqX9Je9mrZq0t8wEeFdRxkE5AC ADwdtpeKcrjTBxUE0NeUXamP5TMq7NMXzJP07tTUsEWZrOcYT4kNlC6sZ2a1DrCf6o 5X+R6ScykcAahBHN7Q/dMZ5KZ/GluORcTWH11Gv+hzY+H7XpduiuILm+vWWF6JDwh3 lrMA6Hnx+2B+Gs0eBRGMsqfkr4F95LIXIUYmrMuedGvuLzWH/dm/es9ZGIGidP348z i4r2C4ECAh0UdAH0YHsOYDY7Bk6Z/Pitnm8ybxXCObnxSt9pICI8/i+v9vWwwoXgYP ep0ohDllFnRHg== Date: Wed, 26 Nov 2025 13:00:28 -0700 (MST) From: Paul Walmsley To: =?ISO-8859-15?Q?Cl=E9ment_L=E9ger?= cc: Paul Walmsley , linux-riscv@lists.infradead.org, paul.walmsley@sifive.com, palmer@dabbelt.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hchauhan@ventanamicro.com, apatel@ventanamicro.com, luxu.kernel@bytedance.com, atishp@atishpatra.org, bjorn@rivosinc.com, cuiyunhui@bytedance.com, =?GB2312?B?1cXVucX0?= Subject: Re: [PATCH v8 0/5] riscv: add support for SBI Supervisor Software Events In-Reply-To: <4b22e7c4-4d3d-43b9-bc27-ffd7a86ad26a@rivosinc.com> Message-ID: <39079362-64ce-e951-6906-0302b1e9e55d@kernel.org> References: <20251105082639.342973-1-cleger@rivosinc.com> <176355541775.758643.18140349571928540394.git-patchwork-notify@kernel.org> <350edd01-56ce-6558-1473-4b9231647e1e@kernel.org> <4b22e7c4-4d3d-43b9-bc27-ffd7a86ad26a@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1617688475-1764187232=:894490" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1617688475-1764187232=:894490 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Hi Clément, On Wed, 26 Nov 2025, Clément Léger wrote: > On 11/19/25 16:52, Paul Walmsley wrote: > > > > To add more context: > > > > On Wed, 19 Nov 2025, patchwork-bot+linux-riscv@kernel.org wrote: > > > >> This series was applied to riscv/linux.git (for-next) > >> by Paul Walmsley : > >> > >> On Wed, 5 Nov 2025 08:26:32 +0000 you wrote: > >>> The SBI Supervisor Software Events (SSE) extensions provides a mechanism > >>> to inject software events from an SBI implementation to supervisor > >>> software such that it preempts all other supervisor level traps and > >>> interrupts. This extension is introduced by the SBI v3.0 specification[1]. > >>> > >>> Various events are defined and can be send asynchronously to supervisor > >>> software (RAS, PMU, DEBUG, Asynchronous page fault) from SBI as well > >>> as platform specific events. Events can be either local (per-hart) or > >>> global. Events can be nested on top of each other based on priority and > >>> can interrupt the kernel at any time. > >>> > >>> [...] > >> > >> Here is the summary with links: > >> - [v8,1/5] riscv: add SBI SSE extension definitions > >> https://git.kernel.org/riscv/c/7bba38249b8a > >> - [v8,2/5] riscv: add support for SBI Supervisor Software Events extension > >> https://git.kernel.org/riscv/c/b52179e6de7d > >> - [v8,3/5] drivers: firmware: add riscv SSE support > >> https://git.kernel.org/riscv/c/5ffe60d26107 > >> - [v8,4/5] perf: RISC-V: add support for SSE event > >> https://git.kernel.org/riscv/c/c6f3f04d2a9c > >> - [v8,5/5] selftests/riscv: add SSE test module > >> https://git.kernel.org/riscv/c/a123316660af > > > > This is a pretty sophisticated series. I was hoping to get more test > > reports on it and reviews (as Clément requested as well). In the meantime > > I've pulled them into for-next in the hopes that it might increase the > > number of potential testers. Am still very much interested in any test > > reports or additional reviews; if they come in this week, I'll consider > > rebuilding for-next to add them. > > Since we gathered additional bug/starvation reports with SSE from > Zhanpeng, it would be preferable to remove this series from your branch > if still possible. I'm not currently really available (just had a > newborn) so I won't be able to fix this quickly. No problem, we'll drop it. Congratulations on the new addition to your family, - Paul --8323329-1617688475-1764187232=:894490--