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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b3f2fe8d550sm8349944a12.24.2025.07.23.00.53.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Jul 2025 00:53:19 -0700 (PDT) Message-ID: <39deebf4-79cd-42a0-b49e-01d556e6d1e3@oss.qualcomm.com> Date: Wed, 23 Jul 2025 15:53:13 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: qcom: Add HAMOA-IOT-SOM platform To: Stephan Gerhold , Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250716-hamoa_initial-v1-0-f6f5d0f9a163@oss.qualcomm.com> <20250716-hamoa_initial-v1-3-f6f5d0f9a163@oss.qualcomm.com> <3a381014-cfe4-4b3c-a3c7-df688c1e87cc@oss.qualcomm.com> Content-Language: en-US From: Yijie Yang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=CZ4I5Krl c=1 sm=1 tr=0 ts=688094f1 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=ErcKch8FPRIGc_MFKVoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-ORIG-GUID: HGq_3ABGxxQc3X-W49tDQBFqt7yOz3F2 X-Proofpoint-GUID: HGq_3ABGxxQc3X-W49tDQBFqt7yOz3F2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzIzMDA2NiBTYWx0ZWRfXxYFvHuYWHWar ed3qzywZ+bNGzeOsahZSFi+JlJO0W+fpar6Y/BOehWnWuMahaQnw1e0aom4E/PrLC+4/gV+9/Wh rW2t8/H2SLHJ3aRTzFPLgDDh3gRfS2/WGlNqctHlei6A/mI4VdEZTkHAgfZtukMWkwe1sp3cN0f rz9lD8AbtArxVFGCFpnPpcfQXmJkyqVReMqE+CbPxeDa3poIFpgkuGzOyyMpEFt59mEE9OStu4q 3gaaxosPgB2TgtJuecL9KgP5OvHTZ2m2ZvzVDAVNQD7LoG5vHIP95pJMU3sumPNKnF9gge1RYoX SdtxDWUuIW4j7RXtQi8rpZUyXBsLNaTFXH2SoMFu7mk/FNrDrciXsk8HuPwKNsYJOMFkTw7HLPI CRam3fsIW5NWdTNYP5t+FjG5ts4IGL7vyVG1UZ6s5UtExYZTZ48LzF1xLyQbqitmJmVQkZQl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-23_01,2025-07-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 impostorscore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 bulkscore=0 spamscore=0 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507230066 On 2025-07-18 04:14, Stephan Gerhold wrote: > On Thu, Jul 17, 2025 at 10:10:05PM +0200, Konrad Dybcio wrote: >> On 7/17/25 6:14 PM, Stephan Gerhold wrote: >>> On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >>>> The HAMOA-IOT-SOM is a compact computing module that integrates a System >>>> on Chip (SoC) — specifically the x1e80100 — along with essential >>>> components optimized for IoT applications. It is designed to be mounted on >>>> carrier boards, enabling the development of complete embedded systems. >>>> >>>> This change enables and overlays the following components: >>>> - Regulators on the SOM >>>> - Reserved memory regions >>>> - PCIe6a and its PHY >>>> - PCIe4 and its PHY >>>> - USB0 through USB6 and their PHYs >>>> - ADSP, CDSP >>>> - WLAN, Bluetooth (M.2 interface) >> >> [...] >> >>>> +&usb_mp_hsphy0 { >>>> + vdd-supply = <&vreg_l2e_0p8>; >>>> + vdda12-supply = <&vreg_l3e_1p2>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&usb_mp_hsphy1 { >>>> + vdd-supply = <&vreg_l2e_0p8>; >>>> + vdda12-supply = <&vreg_l3e_1p2>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&usb_mp_qmpphy0 { >>>> + vdda-phy-supply = <&vreg_l3e_1p2>; >>>> + vdda-pll-supply = <&vreg_l3c_0p8>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&usb_mp_qmpphy1 { >>>> + vdda-phy-supply = <&vreg_l3e_1p2>; >>>> + vdda-pll-supply = <&vreg_l3c_0p8>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> >>> >>> Assuming the USB ports are located on the carrier board and not the >>> SoM(?): >>> >>> Are carrier boards required to make use of all these USB >>> ports/interfaces? In my experience it's not unusual that embedded >>> carrier boards use only the functionality that they need. Maybe this >>> should just set the common properties and enabling individual ports for >>> PCIe and USB should be up to the carrier boards. >> >> The PHYs are on the SoC and if the kernel is told they're "disabled", >> they may possibly be left dangling from the bootloader >> > > How is this different from any of the laptops we have upstream? If we're > worried about firmware keeping unused PHYs on, then we should probably > enable all the PHY nodes by default in the SoC .dtsi? Per my understanding, the SoM may be used with various types of firmware, some of which might fully initialize all USB PHYs. In contrast, laptop platforms typically rely on fixed firmware that only initializes what's necessary for boot. > > Thanks, > Stephan -- Best Regards, Yijie