[PATCH 0/3] Remove unused bits from dts and add support for remaining pinctrl macros

[PATCH 0/3] Remove unused bits from dts and add support for remaining pinctrl macros

[Akashdeep Kaur]

This patch series cleans up the dts files to remove the pin control deep 
sleep configuration that does not take effect in hardware.
This series also adds the remaining macros in the pin control file 
supported by SoC so that any configuration can be used as per requirement 
in dts files.

Akashdeep Kaur (3):
  arm64: dts: ti: k3-am62p5-sk: Remove the unused config from
    USB1_DRVVBUS
  arm64: dts: ti: k3-am62x-sk-common: Remove the unused config from
    USB1_DRVVBUS
  arm64: dts: ti: k3-pinctrl: Add the remaining macros

 arch/arm64/boot/dts/ti/k3-am62p5-sk.dts       |  2 +-
 .../arm64/boot/dts/ti/k3-am62x-sk-common.dtsi |  2 +-
 arch/arm64/boot/dts/ti/k3-pinctrl.h           | 66 +++++++++++++++----
 3 files changed, 56 insertions(+), 14 deletions(-)

-- 
2.34.1

[PATCH 1/3] arm64: dts: ti: k3-am62p5-sk: Remove the unused config from USB1_DRVVBUS

[Akashdeep Kaur]

After the SoC has entered the Deep Sleep mode, USB1 can be used to wakeup
the SoC based on USB events triggered by USB devices. This requires that
the pin corresponding to the Type-A connector remains pulled up even after
the SoC has entered the Deep Sleep mode.
For that, either deep Sleep pullup can be selected or the pin can have the
same configuration that it had when SoC was in active mode.
In order for deep sleep configuration to take effect, the deep sleep
control bit has to be enabled.
Remove the deep sleep state configuration from USB1_DRVBUS pin as it is
anyways not taking effect (deep sleep control bit is not set).

This reverts commit 115290c112952db27009668aa7ae2f29920704f0.

Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 899da7896563..e8f0ac2c55e2 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -360,7 +360,7 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
 
 	main_usb1_pins_default: main-usb1-default-pins {
 		pinctrl-single,pins = <
-			AM62PX_IOPAD(0x0258, PIN_INPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (G21) USB1_DRVVBUS */
+			AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
 		>;
 	};
 
-- 
2.34.1

[PATCH 2/3] arm64: dts: ti: k3-am62x-sk-common: Remove the unused config from USB1_DRVVBUS

[Akashdeep Kaur]

After the SoC has entered the Deep Sleep mode, USB1 can be used to wakeup
the SoC based on USB events triggered by USB devices. This requires that
the pin corresponding to the Type-A connector remains pulled up even after
the SoC has entered the Deep Sleep mode.
For that, either deep Sleep pullup can be selected or the pin can have the
same configuration that it had when SoC was in active mode.
In order for deep sleep configuration to take effect, the deep sleep
control bit has to be enabled.
Remove the deep sleep state configuration from USB1_DRVBUS pin as it is
anyways not taking effect (deep sleep control bit is not set).

This reverts commit 527f884d2d94981016e181dcbd4c4b5bf597c0ad.

Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
index 13e1d36123d5..d3bed23134ca 100644
--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
@@ -249,7 +249,7 @@ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */
 
 	main_usb1_pins_default: main-usb1-default-pins {
 		pinctrl-single,pins = <
-			AM62X_IOPAD(0x0258, PIN_OUTPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (F18/E16) USB1_DRVVBUS */
+			AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */
 		>;
 	};
 
-- 
2.34.1

Re: [PATCH 2/3] arm64: dts: ti: k3-am62x-sk-common: Remove the unused config from USB1_DRVVBUS

[Dhruva Gole]

On Jul 31, 2025 at 17:26:30 +0530, Akashdeep Kaur wrote:
> After the SoC has entered the Deep Sleep mode, USB1 can be used to wakeup

Just leaving my comments on the commit message here since 1st patch
seems to be pretty much the same commit message.

Let's reword this as --> Deep Sleep low power mode.
Makes it a bit more clear.

> the SoC based on USB events triggered by USB devices. This requires that
> the pin corresponding to the Type-A connector remains pulled up even after
> the SoC has entered the Deep Sleep mode.
> For that, either deep Sleep pullup can be selected or the pin can have the

Nit: Be consistent with either deep sleep, or Deep Sleep, don't mix case.
Also, please can we talk here in terms of exactly which macros we're
talking about? For eg. if deep sleep pullup == PIN_DS_PULLUD_ENABLE, then
please mention that in a bracket or something for people who may not
necessarily be aware of all these terms.


> same configuration that it had when SoC was in active mode.
> In order for deep sleep configuration to take effect, the deep sleep
> control bit has to be enabled.

Please talk with some references, because not everyone will be able to
follow what we mean by deep sleep control bit/ deep sleep configuration.

> Remove the deep sleep state configuration from USB1_DRVBUS pin as it is
> anyways not taking effect (deep sleep control bit is not set).
> 
> This reverts commit 527f884d2d94981016e181dcbd4c4b5bf597c0ad.

And so are you in conclusion saying that this patch is just unnecessary/
useless? The bracket message feels to me that you are saying that if we set
the deep sleep control bit this patch will start working as expected?
Please can you clarify a bit on that end?

> 
> Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
> index 13e1d36123d5..d3bed23134ca 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
> @@ -249,7 +249,7 @@ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */
>  
>  	main_usb1_pins_default: main-usb1-default-pins {
>  		pinctrl-single,pins = <
> -			AM62X_IOPAD(0x0258, PIN_OUTPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (F18/E16) USB1_DRVVBUS */
> +			AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */
>  		>;
>  	};
>  

Sorry for the long review on the commit message, but context feels like
everything when it comes to small patches. Hence trying to make sure
everyone understands what's being done here... :)

-- 
Best regards,
Dhruva Gole
Texas Instruments Incorporated

Re: [PATCH 2/3] arm64: dts: ti: k3-am62x-sk-common: Remove the unused config from USB1_DRVVBUS

[Akashdeep Kaur]

Hi Dhruva,

On 13/08/25 18:45, Dhruva Gole wrote:
> On Jul 31, 2025 at 17:26:30 +0530, Akashdeep Kaur wrote:
>> After the SoC has entered the Deep Sleep mode, USB1 can be used to wakeup
> 
> Just leaving my comments on the commit message here since 1st patch
> seems to be pretty much the same commit message.
> 
> Let's reword this as --> Deep Sleep low power mode.
> Makes it a bit more clear.

> 
>> the SoC based on USB events triggered by USB devices. This requires that
>> the pin corresponding to the Type-A connector remains pulled up even after
>> the SoC has entered the Deep Sleep mode.
>> For that, either deep Sleep pullup can be selected or the pin can have the
> 
> Nit: Be consistent with either deep sleep, or Deep Sleep, don't mix case.
> Also, please can we talk here in terms of exactly which macros we're
> talking about? For eg. if deep sleep pullup == PIN_DS_PULLUD_ENABLE, then
> please mention that in a bracket or something for people who may not
> necessarily be aware of all these terms.
Reworded at all instances to TRM mentioned DeepSleep>
>> same configuration that it had when SoC was in active mode.
>> In order for deep sleep configuration to take effect, the deep sleep
>> control bit has to be enabled.
> 
> Please talk with some references, because not everyone will be able to
> follow what we mean by deep sleep control bit/ deep sleep configuration.
> 
>> Remove the deep sleep state configuration from USB1_DRVBUS pin as it is
>> anyways not taking effect (deep sleep control bit is not set).
>>
>> This reverts commit 527f884d2d94981016e181dcbd4c4b5bf597c0ad.
> 
> And so are you in conclusion saying that this patch is just unnecessary/
> useless? The bracket message feels to me that you are saying that if we set
> the deep sleep control bit this patch will start working as expected?
> Please can you clarify a bit on that end?
The intent was that there is no need to set the DeepSleep control bit. 
Also, if that bit is not set, then the current setting is ignored by 
hardware.
> 
>>
>> Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
>> index 13e1d36123d5..d3bed23134ca 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
>> @@ -249,7 +249,7 @@ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */
>>   
>>   	main_usb1_pins_default: main-usb1-default-pins {
>>   		pinctrl-single,pins = <
>> -			AM62X_IOPAD(0x0258, PIN_OUTPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (F18/E16) USB1_DRVVBUS */
>> +			AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */
>>   		>;
>>   	};
>>   
> 
> Sorry for the long review on the commit message, but context feels like
> everything when it comes to small patches. Hence trying to make sure
> everyone understands what's being done here... :)
> 

Regards,
Akashdeep Kaur

[PATCH 3/3] arm64: dts: ti: k3-pinctrl: Add the remaining macros

[Akashdeep Kaur]

Add the drive strength, schmitt trigger enable macros to pinctrl file.
Add the missing macros for deep sleep configuration control.
Reword the existing deep sleep macros to provide combinations that can
directly be used in device tree files.

Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
---
 arch/arm64/boot/dts/ti/k3-pinctrl.h | 66 +++++++++++++++++++++++------
 1 file changed, 54 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h
index c0f09be8d3f9..f26f1fcf6f74 100644
--- a/arch/arm64/boot/dts/ti/k3-pinctrl.h
+++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h
@@ -3,7 +3,7 @@
  * This header provides constants for pinctrl bindings for TI's K3 SoC
  * family.
  *
- * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/
  */
 #ifndef DTS_ARM64_TI_K3_PINCTRL_H
 #define DTS_ARM64_TI_K3_PINCTRL_H
@@ -19,6 +19,13 @@
 #define DS_OUT_VAL_SHIFT	(26)
 #define DS_PULLUD_EN_SHIFT	(27)
 #define DS_PULLTYPE_SEL_SHIFT	(28)
+#define WKUP_EN_SHIFT		    (29)
+#define WKUP_LVL_EN_SHIFT	    (7)
+#define WKUP_LVL_POL_SHIFT	    (8)
+#define ST_EN_SHIFT		        (14)
+#define DRV_STR_SHIFT		    (19)
+#define DS_ISO_OVERRIDE_EN_SHIFT (22)
+#define DS_ISO_BYPASS_EN_SHIFT  (23)
 
 /* Schmitt trigger configuration */
 #define ST_DISABLE		(0 << ST_EN_SHIFT)
@@ -33,6 +40,26 @@
 #define INPUT_EN		(1 << RXACTIVE_SHIFT)
 #define INPUT_DISABLE		(0 << RXACTIVE_SHIFT)
 
+#define DS_PULL_DISABLE		(1 << DS_PULLUD_EN_SHIFT)
+#define DS_PULL_ENABLE		(0 << DS_PULLUD_EN_SHIFT)
+
+#define DS_PULL_UP			(1 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)
+#define DS_PULL_DOWN		(0 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)
+
+#define DS_INPUT_EN		    (1 << DS_OUT_DIS_SHIFT)
+#define DS_INPUT_DISABLE    (0 << DS_OUT_DIS_SHIFT)
+
+#define DS_OUT_VALUE_ZERO   (0 << DS_OUT_VAL_SHIFT)
+#define DS_OUT_VALUE_ONE    (1 << DS_OUT_VAL_SHIFT)
+
+#define WKUP_ENABLE		    (1 << WKUP_EN_SHIFT)
+#define WKUP_ON_LEVEL		(1 << WKUP_LVL_EN_SHIFT)
+#define WKUP_ON_EDGE        (0 << WKUP_LVL_EN_SHIFT)
+#define WKUP_LEVEL_LOW      (0 << WKUP_LVL_POL_SHIFT)
+#define WKUP_LEVEL_HIGH		(1 << WKUP_LVL_POL_SHIFT)
+
+#define WKUP_DISABLE        (0 << WKUP_EN_SHIFT)
+
 /* Only these macros are expected be used directly in device tree files */
 #define PIN_OUTPUT		(INPUT_DISABLE | PULL_DISABLE)
 #define PIN_OUTPUT_PULLUP	(INPUT_DISABLE | PULL_UP)
@@ -53,18 +80,33 @@
 #define PIN_DEBOUNCE_CONF5	(5 << DEBOUNCE_SHIFT)
 #define PIN_DEBOUNCE_CONF6	(6 << DEBOUNCE_SHIFT)
 
+#define PIN_DRIVE_STRENGTH_NOMINAL	(0 << DRV_STR_SHIFT)
+#define PIN_DRIVE_STRENGTH_SLOW	    (1 << DRV_STR_SHIFT)
+#define PIN_DRIVE_STRENGTH_FAST	    (2 << DRV_STR_SHIFT)
+
+#define PIN_SCHMITT_TRIGGER_DISABLE	(0 << ST_EN_SHIFT)
+#define PIN_SCHMITT_TRIGGER_ENABLE	(1 << ST_EN_SHIFT)
+
 #define PIN_DS_FORCE_DISABLE		(0 << FORCE_DS_EN_SHIFT)
-#define PIN_DS_FORCE_ENABLE		(1 << FORCE_DS_EN_SHIFT)
-#define PIN_DS_IO_OVERRIDE_DISABLE	(0 << DS_IO_OVERRIDE_EN_SHIFT)
-#define PIN_DS_IO_OVERRIDE_ENABLE	(1 << DS_IO_OVERRIDE_EN_SHIFT)
-#define PIN_DS_OUT_ENABLE		(0 << DS_OUT_DIS_SHIFT)
-#define PIN_DS_OUT_DISABLE		(1 << DS_OUT_DIS_SHIFT)
-#define PIN_DS_OUT_VALUE_ZERO		(0 << DS_OUT_VAL_SHIFT)
-#define PIN_DS_OUT_VALUE_ONE		(1 << DS_OUT_VAL_SHIFT)
-#define PIN_DS_PULLUD_ENABLE		(0 << DS_PULLUD_EN_SHIFT)
-#define PIN_DS_PULLUD_DISABLE		(1 << DS_PULLUD_EN_SHIFT)
-#define PIN_DS_PULL_DOWN		(0 << DS_PULLTYPE_SEL_SHIFT)
-#define PIN_DS_PULL_UP			(1 << DS_PULLTYPE_SEL_SHIFT)
+#define PIN_DS_FORCE_ENABLE		    (1 << FORCE_DS_EN_SHIFT)
+#define PIN_DS_ISO_OVERRIDE_DISABLE	(0 << DS_ISO_OVERRIDE_EN_SHIFT)
+#define PIN_DS_ISO_OVERRIDE	        (1 << DS_ISO_OVERRIDE_EN_SHIFT)
+#define PIN_DS_ISO_BYPASS           (1 << DS_ISO_BYPASS_EN_SHIFT)
+#define PIN_DS_ISO_BYPASS_DISABLE   (0 << DS_ISO_BYPASS_EN_SHIFT)
+
+#define DS_STATE_VAL        (1 << DS_EN_SHIFT)
+#define ACTIVE_STATE_VAL    (0 << DS_EN_SHIFT)
+
+#define PIN_DS_OUTPUT_LOW       (DS_STATE_VAL | DS_INPUT_DISABLE | DS_OUT_VALUE_ZERO)
+#define PIN_DS_OUTPUT_HIGH      (DS_STATE_VAL | DS_INPUT_DISABLE | DS_OUT_VALUE_ONE)
+#define PIN_DS_INPUT            (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_DISABLE)
+#define PIN_DS_INPUT_PULLUP	    (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_UP)
+#define PIN_DS_INPUT_PULLDOWN   (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_DOWN)
+
+#define WKUP_EN_EDGE		(WKUP_ENABLE | WKUP_ON_EDGE)
+#define WKUP_EN_LEVEL_LOW	(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_LOW)
+#define WKUP_EN_LEVEL_HIGH	(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH)
+#define WKUP_EN		        WKUP_EN_EDGE
 
 /* Default mux configuration for gpio-ranges to use with pinctrl */
 #define PIN_GPIO_RANGE_IOPAD	(PIN_INPUT | 7)
-- 
2.34.1

Re: [PATCH 3/3] arm64: dts: ti: k3-pinctrl: Add the remaining macros

[Dhruva Gole]

Akashdeep,

On Jul 31, 2025 at 17:26:31 +0530, Akashdeep Kaur wrote:
> Add the drive strength, schmitt trigger enable macros to pinctrl file.
> Add the missing macros for deep sleep configuration control.

Please can you add sources/ links to the TRM/collateral and sections where you get
all this information from?

> Reword the existing deep sleep macros to provide combinations that can
> directly be used in device tree files.

I am not very clear on what this line is trying to say. Can you explain
a bit more with an example of a reword and how it is helping?

> 
> Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-pinctrl.h | 66 +++++++++++++++++++++++------
>  1 file changed, 54 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> index c0f09be8d3f9..f26f1fcf6f74 100644
> --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h
> +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> @@ -3,7 +3,7 @@
>   * This header provides constants for pinctrl bindings for TI's K3 SoC
>   * family.
>   *
> - * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
> + * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/
>   */
>  #ifndef DTS_ARM64_TI_K3_PINCTRL_H
>  #define DTS_ARM64_TI_K3_PINCTRL_H
> @@ -19,6 +19,13 @@
>  #define DS_OUT_VAL_SHIFT	(26)
>  #define DS_PULLUD_EN_SHIFT	(27)
>  #define DS_PULLTYPE_SEL_SHIFT	(28)
> +#define WKUP_EN_SHIFT		    (29)
> +#define WKUP_LVL_EN_SHIFT	    (7)
> +#define WKUP_LVL_POL_SHIFT	    (8)
> +#define ST_EN_SHIFT		        (14)
> +#define DRV_STR_SHIFT		    (19)
> +#define DS_ISO_OVERRIDE_EN_SHIFT (22)
> +#define DS_ISO_BYPASS_EN_SHIFT  (23)

Seeing it on lore and in my git log -p as well, the alignment looks off.
Please fix it.

>  
>  /* Schmitt trigger configuration */
>  #define ST_DISABLE		(0 << ST_EN_SHIFT)
> @@ -33,6 +40,26 @@
>  #define INPUT_EN		(1 << RXACTIVE_SHIFT)
>  #define INPUT_DISABLE		(0 << RXACTIVE_SHIFT)
>  
> +#define DS_PULL_DISABLE		(1 << DS_PULLUD_EN_SHIFT)
> +#define DS_PULL_ENABLE		(0 << DS_PULLUD_EN_SHIFT)
> +
> +#define DS_PULL_UP			(1 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)
> +#define DS_PULL_DOWN		(0 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)
> +
> +#define DS_INPUT_EN		    (1 << DS_OUT_DIS_SHIFT)
> +#define DS_INPUT_DISABLE    (0 << DS_OUT_DIS_SHIFT)
> +
> +#define DS_OUT_VALUE_ZERO   (0 << DS_OUT_VAL_SHIFT)
> +#define DS_OUT_VALUE_ONE    (1 << DS_OUT_VAL_SHIFT)
> +
> +#define WKUP_ENABLE		    (1 << WKUP_EN_SHIFT)
> +#define WKUP_ON_LEVEL		(1 << WKUP_LVL_EN_SHIFT)
> +#define WKUP_ON_EDGE        (0 << WKUP_LVL_EN_SHIFT)
> +#define WKUP_LEVEL_LOW      (0 << WKUP_LVL_POL_SHIFT)
> +#define WKUP_LEVEL_HIGH		(1 << WKUP_LVL_POL_SHIFT)
> +
> +#define WKUP_DISABLE        (0 << WKUP_EN_SHIFT)
> +

These too, fix all alignment issues please.

>  /* Only these macros are expected be used directly in device tree files */
>  #define PIN_OUTPUT		(INPUT_DISABLE | PULL_DISABLE)
>  #define PIN_OUTPUT_PULLUP	(INPUT_DISABLE | PULL_UP)
> @@ -53,18 +80,33 @@
>  #define PIN_DEBOUNCE_CONF5	(5 << DEBOUNCE_SHIFT)
>  #define PIN_DEBOUNCE_CONF6	(6 << DEBOUNCE_SHIFT)
>  
> +#define PIN_DRIVE_STRENGTH_NOMINAL	(0 << DRV_STR_SHIFT)
> +#define PIN_DRIVE_STRENGTH_SLOW	    (1 << DRV_STR_SHIFT)
> +#define PIN_DRIVE_STRENGTH_FAST	    (2 << DRV_STR_SHIFT)
> +
> +#define PIN_SCHMITT_TRIGGER_DISABLE	(0 << ST_EN_SHIFT)
> +#define PIN_SCHMITT_TRIGGER_ENABLE	(1 << ST_EN_SHIFT)
> +
>  #define PIN_DS_FORCE_DISABLE		(0 << FORCE_DS_EN_SHIFT)
> -#define PIN_DS_FORCE_ENABLE		(1 << FORCE_DS_EN_SHIFT)
> -#define PIN_DS_IO_OVERRIDE_DISABLE	(0 << DS_IO_OVERRIDE_EN_SHIFT)
> -#define PIN_DS_IO_OVERRIDE_ENABLE	(1 << DS_IO_OVERRIDE_EN_SHIFT)
> -#define PIN_DS_OUT_ENABLE		(0 << DS_OUT_DIS_SHIFT)
> -#define PIN_DS_OUT_DISABLE		(1 << DS_OUT_DIS_SHIFT)
> -#define PIN_DS_OUT_VALUE_ZERO		(0 << DS_OUT_VAL_SHIFT)
> -#define PIN_DS_OUT_VALUE_ONE		(1 << DS_OUT_VAL_SHIFT)
> -#define PIN_DS_PULLUD_ENABLE		(0 << DS_PULLUD_EN_SHIFT)
> -#define PIN_DS_PULLUD_DISABLE		(1 << DS_PULLUD_EN_SHIFT)
> -#define PIN_DS_PULL_DOWN		(0 << DS_PULLTYPE_SEL_SHIFT)
> -#define PIN_DS_PULL_UP			(1 << DS_PULLTYPE_SEL_SHIFT)
> +#define PIN_DS_FORCE_ENABLE		    (1 << FORCE_DS_EN_SHIFT)
> +#define PIN_DS_ISO_OVERRIDE_DISABLE	(0 << DS_ISO_OVERRIDE_EN_SHIFT)
> +#define PIN_DS_ISO_OVERRIDE	        (1 << DS_ISO_OVERRIDE_EN_SHIFT)
> +#define PIN_DS_ISO_BYPASS           (1 << DS_ISO_BYPASS_EN_SHIFT)
> +#define PIN_DS_ISO_BYPASS_DISABLE   (0 << DS_ISO_BYPASS_EN_SHIFT)
> +
> +#define DS_STATE_VAL        (1 << DS_EN_SHIFT)
> +#define ACTIVE_STATE_VAL    (0 << DS_EN_SHIFT)
> +
> +#define PIN_DS_OUTPUT_LOW       (DS_STATE_VAL | DS_INPUT_DISABLE | DS_OUT_VALUE_ZERO)
> +#define PIN_DS_OUTPUT_HIGH      (DS_STATE_VAL | DS_INPUT_DISABLE | DS_OUT_VALUE_ONE)
> +#define PIN_DS_INPUT            (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_DISABLE)
> +#define PIN_DS_INPUT_PULLUP	    (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_UP)
> +#define PIN_DS_INPUT_PULLDOWN   (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_DOWN)
> +
> +#define WKUP_EN_EDGE		(WKUP_ENABLE | WKUP_ON_EDGE)
> +#define WKUP_EN_LEVEL_LOW	(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_LOW)
> +#define WKUP_EN_LEVEL_HIGH	(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH)
> +#define WKUP_EN		        WKUP_EN_EDGE


-- 
Best regards,
Dhruva Gole
Texas Instruments Incorporated

Re: [PATCH 3/3] arm64: dts: ti: k3-pinctrl: Add the remaining macros

[Akashdeep Kaur]

Hi Dhruva,

On 13/08/25 18:35, Dhruva Gole wrote:
> Akashdeep,
> 
...
>> Add the missing macros for deep sleep configuration control.
> 
> Please can you add sources/ links to the TRM/collateral and sections where you get
> all this information from?

Added TRM reference links
> 
>> Reword the existing deep sleep macros to provide combinations that can
>> directly be used in device tree files.
> 
> I am not very clear on what this line is trying to say. Can you explain
> a bit more with an example of a reword and how it is helping?
Added example
> 
>>
>> Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
...
>> +#define WKUP_LVL_EN_SHIFT	    (7)
>> +#define WKUP_LVL_POL_SHIFT	    (8)
>> +#define ST_EN_SHIFT		        (14)
>> +#define DRV_STR_SHIFT		    (19)
>> +#define DS_ISO_OVERRIDE_EN_SHIFT (22)
>> +#define DS_ISO_BYPASS_EN_SHIFT  (23)
> 
> Seeing it on lore and in my git log -p as well, the alignment looks off.
> Please fix it.
> 
Fixed
>>   
>>   /* Schmitt trigger configuration */
>>   #define ST_DISABLE		(0 << ST_EN_SHIFT)
...
>> +
>> +#define WKUP_DISABLE        (0 << WKUP_EN_SHIFT)
>> +
> 
> These too, fix all alignment issues please.
Fixed
> 
>>   /* Only these macros are expected be used directly in device tree files */
>>   #define PIN_OUTPUT		(INPUT_DISABLE | PULL_DISABLE)
...

Regards,
Akashdeep Kaur

Re: [PATCH 3/3] arm64: dts: ti: k3-pinctrl: Add the remaining macros

[Vignesh Raghavendra]

On 31/07/25 17:26, Akashdeep Kaur wrote:
> Add the drive strength, schmitt trigger enable macros to pinctrl file.
> Add the missing macros for deep sleep configuration control.
> Reword the existing deep sleep macros to provide combinations that can
> directly be used in device tree files.
> 
> Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-pinctrl.h | 66 +++++++++++++++++++++++------
>  1 file changed, 54 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> index c0f09be8d3f9..f26f1fcf6f74 100644
> --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h
> +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> @@ -3,7 +3,7 @@
>   * This header provides constants for pinctrl bindings for TI's K3 SoC
>   * family.
>   *
> - * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
> + * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/
>   */
>  #ifndef DTS_ARM64_TI_K3_PINCTRL_H
>  #define DTS_ARM64_TI_K3_PINCTRL_H
> @@ -19,6 +19,13 @@
>  #define DS_OUT_VAL_SHIFT	(26)
>  #define DS_PULLUD_EN_SHIFT	(27)
>  #define DS_PULLTYPE_SEL_SHIFT	(28)


> +#define WKUP_EN_SHIFT		    (29)
> +#define WKUP_LVL_EN_SHIFT	    (7)
> +#define WKUP_LVL_POL_SHIFT	    (8)
> +#define ST_EN_SHIFT		        (14)
> +#define DRV_STR_SHIFT		    (19)
> +#define DS_ISO_OVERRIDE_EN_SHIFT (22)
> +#define DS_ISO_BYPASS_EN_SHIFT  (23)

These *_SHIFT macros are mostly arranged in ascending order of bit
position, please follow the same.

Also, ST_EN_SHIFT is already defined ?

>  
>  /* Schmitt trigger configuration */
>  #define ST_DISABLE		(0 << ST_EN_SHIFT)
> @@ -33,6 +40,26 @@
>  #define INPUT_EN		(1 << RXACTIVE_SHIFT)
>  #define INPUT_DISABLE		(0 << RXACTIVE_SHIFT)
>  
> +#define DS_PULL_DISABLE		(1 << DS_PULLUD_EN_SHIFT)
> +#define DS_PULL_ENABLE		(0 << DS_PULLUD_EN_SHIFT)
> +
> +#define DS_PULL_UP			(1 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)
> +#define DS_PULL_DOWN		(0 << DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)
> +
> +#define DS_INPUT_EN		    (1 << DS_OUT_DIS_SHIFT)
> +#define DS_INPUT_DISABLE    (0 << DS_OUT_DIS_SHIFT)
> +
> +#define DS_OUT_VALUE_ZERO   (0 << DS_OUT_VAL_SHIFT)
> +#define DS_OUT_VALUE_ONE    (1 << DS_OUT_VAL_SHIFT)
> +
> +#define WKUP_ENABLE		    (1 << WKUP_EN_SHIFT)
> +#define WKUP_ON_LEVEL		(1 << WKUP_LVL_EN_SHIFT)
> +#define WKUP_ON_EDGE        (0 << WKUP_LVL_EN_SHIFT)
> +#define WKUP_LEVEL_LOW      (0 << WKUP_LVL_POL_SHIFT)
> +#define WKUP_LEVEL_HIGH		(1 << WKUP_LVL_POL_SHIFT)
> +
> +#define WKUP_DISABLE        (0 << WKUP_EN_SHIFT)
> +
>  /* Only these macros are expected be used directly in device tree files */
>  #define PIN_OUTPUT		(INPUT_DISABLE | PULL_DISABLE)
>  #define PIN_OUTPUT_PULLUP	(INPUT_DISABLE | PULL_UP)
> @@ -53,18 +80,33 @@
>  #define PIN_DEBOUNCE_CONF5	(5 << DEBOUNCE_SHIFT)
>  #define PIN_DEBOUNCE_CONF6	(6 << DEBOUNCE_SHIFT)
>  
> +#define PIN_DRIVE_STRENGTH_NOMINAL	(0 << DRV_STR_SHIFT)
> +#define PIN_DRIVE_STRENGTH_SLOW	    (1 << DRV_STR_SHIFT)
> +#define PIN_DRIVE_STRENGTH_FAST	    (2 << DRV_STR_SHIFT)
> +
> +#define PIN_SCHMITT_TRIGGER_DISABLE	(0 << ST_EN_SHIFT)
> +#define PIN_SCHMITT_TRIGGER_ENABLE	(1 << ST_EN_SHIFT)
> +
>  #define PIN_DS_FORCE_DISABLE		(0 << FORCE_DS_EN_SHIFT)
> -#define PIN_DS_FORCE_ENABLE		(1 << FORCE_DS_EN_SHIFT)
> -#define PIN_DS_IO_OVERRIDE_DISABLE	(0 << DS_IO_OVERRIDE_EN_SHIFT)
> -#define PIN_DS_IO_OVERRIDE_ENABLE	(1 << DS_IO_OVERRIDE_EN_SHIFT)
> -#define PIN_DS_OUT_ENABLE		(0 << DS_OUT_DIS_SHIFT)
> -#define PIN_DS_OUT_DISABLE		(1 << DS_OUT_DIS_SHIFT)
> -#define PIN_DS_OUT_VALUE_ZERO		(0 << DS_OUT_VAL_SHIFT)
> -#define PIN_DS_OUT_VALUE_ONE		(1 << DS_OUT_VAL_SHIFT)
> -#define PIN_DS_PULLUD_ENABLE		(0 << DS_PULLUD_EN_SHIFT)
> -#define PIN_DS_PULLUD_DISABLE		(1 << DS_PULLUD_EN_SHIFT)
> -#define PIN_DS_PULL_DOWN		(0 << DS_PULLTYPE_SEL_SHIFT)
> -#define PIN_DS_PULL_UP			(1 << DS_PULLTYPE_SEL_SHIFT)

No we cannot delete these. There maybe downstream dts files already
using these macros and thus can cause incompatibilities.

> +#define PIN_DS_FORCE_ENABLE		    (1 << FORCE_DS_EN_SHIFT)

> +#define PIN_DS_ISO_OVERRIDE_DISABLE	(0 << DS_ISO_OVERRIDE_EN_SHIFT)
> +#define PIN_DS_ISO_OVERRIDE	        (1 << DS_ISO_OVERRIDE_EN_SHIFT)
> +#define PIN_DS_ISO_BYPASS           (1 << DS_ISO_BYPASS_EN_SHIFT)
> +#define PIN_DS_ISO_BYPASS_DISABLE   (0 << DS_ISO_BYPASS_EN_SHIFT)
> +
> +#define DS_STATE_VAL        (1 << DS_EN_SHIFT)
> +#define ACTIVE_STATE_VAL    (0 << DS_EN_SHIFT)
> +
> +#define PIN_DS_OUTPUT_LOW       (DS_STATE_VAL | DS_INPUT_DISABLE | DS_OUT_VALUE_ZERO)
> +#define PIN_DS_OUTPUT_HIGH      (DS_STATE_VAL | DS_INPUT_DISABLE | DS_OUT_VALUE_ONE)
> +#define PIN_DS_INPUT            (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_DISABLE)
> +#define PIN_DS_INPUT_PULLUP	    (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_UP)
> +#define PIN_DS_INPUT_PULLDOWN   (DS_STATE_VAL | DS_INPUT_EN | DS_PULL_DOWN)
> +

> +#define WKUP_EN_EDGE		(WKUP_ENABLE | WKUP_ON_EDGE)
> +#define WKUP_EN_LEVEL_LOW	(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_LOW)
> +#define WKUP_EN_LEVEL_HIGH	(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH)
> +#define WKUP_EN		        WKUP_EN_EDGE

All existing macros in this block have PIN_* suffix. Please align with
the same.

>  
>  /* Default mux configuration for gpio-ranges to use with pinctrl */
>  #define PIN_GPIO_RANGE_IOPAD	(PIN_INPUT | 7)


For future versions, please split the changes to 2 patches: one for
white-space changes only and one for addition of new macros.

-- 
Regards
Vignesh
https://ti.com/opensource

Re: [PATCH 3/3] arm64: dts: ti: k3-pinctrl: Add the remaining macros

[Akashdeep Kaur]

Hi Vignesh,

On 13/08/25 20:08, Vignesh Raghavendra wrote:
> 
> 
> On 31/07/25 17:26, Akashdeep Kaur wrote:
>> Add the drive strength, schmitt trigger enable macros to pinctrl file.
...
>> +#define DS_ISO_OVERRIDE_EN_SHIFT (22)
>> +#define DS_ISO_BYPASS_EN_SHIFT  (23)
> 
> These *_SHIFT macros are mostly arranged in ascending order of bit
> position, please follow the same.
Rearranged the newly added macros to mostly fit in ascending order.
> 
> Also, ST_EN_SHIFT is already defined ?
Removed
> 
>>   
>>   /* Schmitt trigger configuration */
>>   #define ST_DISABLE		(0 << ST_EN_SHIFT)
...
>> -#define PIN_DS_PULL_DOWN		(0 << DS_PULLTYPE_SEL_SHIFT)
>> -#define PIN_DS_PULL_UP			(1 << DS_PULLTYPE_SEL_SHIFT)
> 
> No we cannot delete these. There maybe downstream dts files already
> using these macros and thus can cause incompatibilities.
Added these back for backward compatibility
> 
>> +#define PIN_DS_FORCE_ENABLE		    (1 << FORCE_DS_EN_SHIFT)
...
>> +#define WKUP_EN_LEVEL_HIGH	(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH)
>> +#define WKUP_EN		        WKUP_EN_EDGE
> 
> All existing macros in this block have PIN_* suffix. Please align with
> the same.

Added
> 
>>   
>>   /* Default mux configuration for gpio-ranges to use with pinctrl */
>>   #define PIN_GPIO_RANGE_IOPAD	(PIN_INPUT | 7)
> 
> 
> For future versions, please split the changes to 2 patches: one for
> white-space changes only and one for addition of new macros.
Point Noted

Regards,
Akashdeep Kaur