Re: [patch-2.4.0-test12-pre3] microcode update for P4 (fwd)

["H. Peter Anvin" <hpa@transmeta.com>]

Tigran Aivazian wrote:
> 
> On Sat, 2 Dec 2000, H. Peter Anvin wrote:
> 
> > Alan Cox wrote:
> > >
> > > > Please call these MSR_* instead, "IA32_*" isn't very descriptive,
> > > > besides, the preferred prefix in existing locations in the Linux
> > > > kernel is "X86_", e.g. X86_EFLAGS_IF or X86_CR4_PSE.  I think there
> > >
> > > I think I agree with Tigran's naming. These are IA32 registers not X86 ones ;)
> >
> > They are MSRs, most of all.  His naming didn't reflect that, and quite
> > frankly, I'd much rather use the names (all starting with MSR_) that the
> > Intel documentation uses.
> >
> 
> Peter,
> 
> you probably missed the message I sent to you earlier. I have already
> explained that I did use the names which Intel documentation uses. You may
> have an old (Pentium III) version of the manual but the current
> (P4) is already available (albeit a preliminary) and that is what I used
> as a guidance.
> 
> It makes sense to check the facts before stating the same wrong statement
> twice.
> 

OK, fair enough.  Let me make a new statement then: I suggest we preface
these with MSR_ anyway so we can tell what they really are.

	-hpa

-- 
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