Re: question about tulip patch to set CSR0 for pci 2.0 bus

[Jeff Garzik <jgarzik@mandrakesoft.com>]

Clayton Weaver wrote:
> 
> Shouldn't the setting of the CSR0 value for x86 switch between normal
> (0x01A08000) and cautious (0x01A04800) based on some notion of
> what generation of pci bus is installed rather than what cpu the kernel
> is compiled for?
> 
> That's one thing that bothered me about the method that the .90 driver
> used. It worked for me, of course, cool, but when I thought about putting
> a real general purpose patch into later versions of tulip.c to solve the
> same problem, it bothered me that the old method assumes an association
> between pci bus and cpu that may not be valid. I don't know that
> there are any 386/486/5x86 systems that can use the 0x01A08000 setting
> (that apparently works on most x86 pci 2.1 busses), but then again I don't
> know that there aren't, either.
> 
> If the pci bus level is 2.0, it makes sense to use the cautious CSR0
> setting, for the same reasons that the .90 tulip.c in 2.0.38 does, and if
> the pci level is 2.1, you aren't taking any chances with 0x01A08000 that
> the driver doesn't take now. The pci driver, initialized before any
> pci devices, appears to know whether you have a pci 2.0 or pci 2.1 bus, so
> why not use that information instead of cpu generation?

A good suggestion, too...   Some other hardware behaves differently
based on PCI bus version, it would be nice for the driver to notice that
and enable (or disable) advanced features.  To blindly assume is just a
PCI bus lockup waiting to happen... 

	Jeff


-- 
Jeff Garzik         |
Building 1024       | These are not the J's you're lookin' for.
MandrakeSoft        | It's an old Jedi mind trick.
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