Re: [PATCH] Cyrix III boot fix and bug report

["H. Peter Anvin" <hpa@transmeta.com>]

Alan Cox wrote:
> 
> > (Could this code have been written by someone who was confused between
> > MSR 0x80000001 and CPUID 0x80000001?)
> 
> It looks like thats what happened. The docs say it has 3dnow and mmx but
> I think your diagnosis is correct

Especially since it's bit 31 in EDX.  I don't think Cyrixi uses MSRs in
the 0x8000xxxx range.  I bet this should have been CPUID.

I suspect that that whole code should look more like this.  The MSR
access shouldn't have any effect on the extended CPUID flags, so that
shouldn't need to be there at all, unless there are Cyrix III's out there
which fail to report it in CPUID.

	-hpa

	case 6: /* Cyrix III */
		rdmsr (0x1107, lo, hi);
		lo |= (1<<1 | 1<<7);    /* Report CX8 & enable PGE */
                wrmsr (0x1107, lo, hi);

		/* Update the feature flags to include just revealed ones */
		c->x86_capability[0] = cpuid_edx(1);

		get_model_name(c);
		display_cacheinfo(c);
                break;


-- 
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