VIA 686B/Data Corruption FAQ

VIA 686B/Data Corruption FAQ

[Gareth Hughes]

http://www.viahardware.com/686bfaq.shtm

Couldn't find a mention of this in the archives, but those interested in
the VIA chipset issues should check this out.  The page contains the
following officail statement from VIA:

The data corruption error, which some web sites and people have reported
with the 686b Southbridge, is caused by incorrect bios registry setting
to the Northbridge. These bios settings were made by motherboard
manufacturers, in an attempt to fix a conflict with the Sound Blaster
Live Value cards. Information has been provided to all motherboard
manufacturers on how to correctly resolve both the data corruption error
and the Sound Blaster Live conflict. The patch released by VIA in the
4in1 4.31 drivers replicates the correct bios settings. We provided
this patch to make sure as many people got a fix to their Sound Blaster
Live problems as soon as possible. Most motherboard manufacturers have
now corrected their bios and the patch is not necessarily needed
although it will not harm any VIA based system if installed.

-- Gareth

Re: VIA 686B/Data Corruption FAQ

[Alan Cox]

> http://www.viahardware.com/686bfaq.shtm
> 
> Couldn't find a mention of this in the archives, but those interested in
> the VIA chipset issues should check this out.  The page contains the
> following officail statement from VIA:

Yeah I've seen it, but they won't tell people what is in it which is useless
to non windows people. The whole procedure is quite complex because the fixups
depend which PCI cards you have (eg ES137x 'SB PCI 64/SB PCI 128' cards don't
work with the base set of fixups but apparently use a different set)

Alan

Re: VIA 686B/Data Corruption

[Jussi Laako]

A little test report follows...

Just tested RedHat's 2.4.3-12 and 2.4.5-ac19 on A7V133 mobo. RedHat's kernel
seems to work without lockups, but 2.4.5-ac19 doesn't (locks up at boot,
compiled w/o athlon optimization and ACPI), so no changes on that.

2.4.3-12 also correctly detects cable connected to VIA controller as 40-w
while 2.4.5-ac19 still detects it as 80-w.

2.4.3-12 although seems to have the reiserfs unmount lock race, so I can't
use it... :(

 - Jussi Laako

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Re: VIA 686B/Data Corruption

[Alan Cox]

> Just tested RedHat's 2.4.3-12 and 2.4.5-ac19 on A7V133 mobo. RedHat's kernel
> seems to work without lockups, but 2.4.5-ac19 doesn't (locks up at boot,
> compiled w/o athlon optimization and ACPI), so no changes on that.

Interesting. They should be the same code for the VIA driver.

> 2.4.3-12 although seems to have the reiserfs unmount lock race, so I can't
> use it... :(

Possibly.  If so file that in bugzilla so it gets fixed

Re: VIA 686B/Data Corruption

[Ryan W. Maple]

On Thu, 28 Jun 2001, Alan Cox wrote:

> > Just tested RedHat's 2.4.3-12 and 2.4.5-ac19 on A7V133 mobo. RedHat's kernel
> > seems to work without lockups, but 2.4.5-ac19 doesn't (locks up at boot,
> > compiled w/o athlon optimization and ACPI), so no changes on that.
> 
> Interesting. They should be the same code for the VIA driver.

I remember hearing something about Red Hat disabling UDMA on VIA chips
across the board.  Maybe that has something to do with it?

-r

Re: VIA 686B/Data Corruption

[Alan Cox]

> > Interesting. They should be the same code for the VIA driver.
> 
> I remember hearing something about Red Hat disabling UDMA on VIA chips
> across the board.  Maybe that has something to do with it?

The RH 7.1 kernel disables VIA UDMA if the board has a DMI string indiciating
its a KT7 or KT7RAID. The errata kernel applies the fixups that people deduced
by hacking on the VIA stuff

Alan

Re: VIA 686B/Data Corruption

[Jussi Laako]

"Ryan W. Maple" wrote:
> 
> I remember hearing something about Red Hat disabling UDMA on VIA chips
> across the board.  Maybe that has something to do with it?

Dunno, if the kernel lies. There are four HDs on Promise and one HD and one
CDROM on VIA. This is from currently running 2.4.2-2:

----------VIA BusMastering IDE Configuration----------------
Driver Version:                     3.20
South Bridge:                       VIA vt82c686b
Revision:                           ISA 0x40 IDE 0x6
BM-DMA base:                        0xb800
PCI clock:                          33MHz
Master Read  Cycle IRDY:            0ws
Master Write Cycle IRDY:            0ws
BM IDE Status Register Read Retry:  yes
Max DRDY Pulse Width:               No limit
-----------------------Primary IDE-------Secondary IDE------
Read DMA FIFO flush:          yes                 yes
End Sector FIFO flush:         no                  no
Prefetch Buffer:               no                  no
Post Write Buffer:             no                  no
Enabled:                      yes                 yes
Simplex only:                  no                  no
Cable Type:                   40w                 40w
-------------------drive0----drive1----drive2----drive3-----
Transfer Mode:       UDMA       PIO       PIO       PIO

Address Setup:       30ns      30ns     120ns     120ns
Cmd Active:          90ns      90ns     480ns     480ns
Cmd Recovery:        30ns      30ns     480ns     480ns
Data Active:         90ns      90ns     330ns     330ns
Data Recovery:       30ns      30ns     270ns     270ns
Cycle Time:          60ns      90ns      90ns      90ns
Transfer Rate:   33.3MB/s  22.2MB/s  22.2MB/s  22.2MB/s


                                PDC20265 Chipset.
------------------------------- General Status ----------------------------
Burst Mode                           : enabled
Host Mode                            : Normal
Bus Clocking                         : 33 PCI Internal
IO pad select                        : 10 mA
Status Polling Period                : 0
Interrupt Check Status Polling Delay : 2
--------------- Primary Channel ---------------- Secondary Channel --------
                enabled                          enabled 
66 Clocking     enabled                          enabled 
           Mode PCI                         Mode PCI   
                FIFO Empty                       FIFO Empty  
--------------- drive0 --------- drive1 -------- drive0 ---------- drive1 -
DMA enabled:    yes              yes             yes               yes
DMA Mode:       UDMA 4           UDMA 4          UDMA 4            UDMA 4
PIO Mode:       PIO 4            PIO 4           PIO 4             PIO 4


 - Jussi Laako


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