From: Jordan <ledzep37@home.com>
To: Linux Kernel <linux-kernel@vger.kernel.org>
Cc: Dave J <davej@suse.de>
Subject: Discrepancies between /proc/cpuinfo and Dave J's x86info
Date: Tue, 10 Jul 2001 22:19:28 -0500 [thread overview]
Message-ID: <3B4BC5C0.BDDC12A6@home.com> (raw)
While trying to figure out what happened to make my two identical
processors show up differently in /proc/cpuinfo I noticed that they do
not appear differently in the x86info utility. Here is a copy of my
/proc/cpuinfo:
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 8
model name : Pentium III (Coppermine)
stepping : 6
cpu MHz : 999.682
cache size : 256 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 mmx fxsr sse
bogomips : 1992.29
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 8
model name : Pentium III (Coppermine)
stepping : 6
cpu MHz : 999.682
cache size : 256 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 mmx fxsr sse
bogomips : 1998.84
Notice that the cpuid level and bogomips values are reported to be
different, but look at the output of `x86info -a`:
x86info v1.3. Dave Jones 2001
Feedback to <davej@suse.de>.
Found 2 CPUs
eax in: 0, eax = 00000002 ebx = 756e6547 ecx = 6c65746e edx = 49656e69
eax in: 1, eax = 00000686 ebx = 00000002 ecx = 00000000 edx = 0383fbff
eax in: 2, eax = 03020101 ebx = 00000000 ecx = 00000000 edx = 0c040882
Vendor ID: "GenuineIntel"; Max CPUID level 2
Intel-specific functions
Family: 6 Model: 8 Type 0 [Celeron / Pentium III (Coppermine) Original
OEM]
Stepping: 6
Reserved: 0
Feature flags 0383fbff:
FPU Floating Point Unit
VME Virtual 8086 Mode Enhancements
DE Debugging Extensions
PSE Page Size Extensions
TSC Time Stamp Counter
MSR Model Specific Registers
PAE Physical Address Extension
MCE Machine Check Exception
CX8 COMPXCHG8B Instruction
APIC On-chip Advanced Programmable Interrupt Controller present and
enabled
SEP Fast System Call
MTRR Memory Type Range Registers
PGE PTE Global Flag
MCA Machine Check Architecture
CMOV Conditional Move and Compare Instructions
FGPAT Page Attribute Table
PSE-36 36-bit Page Size Extension
MMX MMX instruction set
FXSR Fast FP/MMX Streaming SIMD Extensions save/restore
XMM Streaming SIMD Extensions instruction set
Instruction TLB: 4KB pages, 4-way set assoc, 32 entries
Instruction TLB: 4MB pages, fully assoc, 2 entries
Data TLB: 4KB pages, 4-way set assoc, 64 entries
L2 unified cache: Sectored, 32 byte cache line, 8 way set associative,
256K
Instruction cache: 16KB, 4-way set assoc, 32 byte line size
Data TLB: 4MB pages, 4-way set assoc, 8 entries
Data cache: 16KB, 2-way or 4-way set assoc, 32 byte line size
Erk, MCG_CTL not present!
eax in: 0, eax = 00000002 ebx = 756e6547 ecx = 6c65746e edx = 49656e69
eax in: 1, eax = 00000686 ebx = 00000002 ecx = 00000000 edx = 0383fbff
eax in: 2, eax = 03020101 ebx = 00000000 ecx = 00000000 edx = 0c040882
Vendor ID: "GenuineIntel"; Max CPUID level 2
Intel-specific functions
Family: 6 Model: 8 Type 0 [Celeron / Pentium III (Coppermine) Original
OEM]
Stepping: 6
Reserved: 0
Feature flags 0383fbff:
FPU Floating Point Unit
VME Virtual 8086 Mode Enhancements
DE Debugging Extensions
PSE Page Size Extensions
TSC Time Stamp Counter
MSR Model Specific Registers
PAE Physical Address Extension
MCE Machine Check Exception
CX8 COMPXCHG8B Instruction
APIC On-chip Advanced Programmable Interrupt Controller present and
enabled
SEP Fast System Call
MTRR Memory Type Range Registers
PGE PTE Global Flag
MCA Machine Check Architecture
CMOV Conditional Move and Compare Instructions
FGPAT Page Attribute Table
PSE-36 36-bit Page Size Extension
MMX MMX instruction set
FXSR Fast FP/MMX Streaming SIMD Extensions save/restore
XMM Streaming SIMD Extensions instruction set
Instruction TLB: 4KB pages, 4-way set assoc, 32 entries
Instruction TLB: 4MB pages, fully assoc, 2 entries
Data TLB: 4KB pages, 4-way set assoc, 64 entries
L2 unified cache: Sectored, 32 byte cache line, 8 way set associative,
256K
Instruction cache: 16KB, 4-way set assoc, 32 byte line size
Data TLB: 4MB pages, 4-way set assoc, 8 entries
Data cache: 16KB, 2-way or 4-way set assoc, 32 byte line size
Erk, MCG_CTL not present!
999MHz processor (estimate).
According to Dave J's utility the cpu's appear to be exactly the same
just as the Intel boxes said when I bought them. What might be causing
these values to be different. And if the BIOS is setting things up
incorrectly then why does Dave J's utility show the correct values?
Thanks for any help.
Jordan
next reply other threads:[~2001-07-11 3:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-07-11 3:19 Jordan [this message]
2001-07-11 4:27 ` Discrepancies between /proc/cpuinfo and Dave J's x86info H. Peter Anvin
2001-07-11 4:37 ` Jonathan Lundell
2001-07-11 4:44 ` H. Peter Anvin
2001-07-11 5:04 ` Jonathan Lundell
2001-07-11 11:00 ` Dave Jones
2001-07-11 12:03 ` Hugh Dickins
2001-07-11 12:23 ` Dave Jones
2001-07-11 14:09 ` [PATCH] " Hugh Dickins
2001-07-11 14:28 ` Dave Jones
2001-07-11 16:47 ` Jonathan Lundell
2001-07-11 17:00 ` Dave Jones
2001-07-12 6:58 ` [PATCH] Re: Discrepancies between /proc/cpuinfo and Dave J's x86i Kai Henningsen
2001-10-10 1:38 ` [PATCH] Re: Discrepancies between /proc/cpuinfo and Dave J's x86info H. Peter Anvin
2001-07-11 16:29 ` Linus Torvalds
2001-07-11 15:51 ` Jordan Breeding
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