Re: CPU frequency shifting "problems"

Alan Cox
2001-09-28T23:04:27Z

> > We do 5uS per transition 4 transitions per bit, 64bits. So thats 1.2mS
> > or using the PM timer thats 0.25 seconds
>
> OK ya lost me...;-)

I got my maths wrong by a slight factor of 1000, ignore me - there is a
reason I didnt do maths at university 8)

> Both Windows and FreeBSD-CURRENT use the PM timer for udelays. It is 3579545
> Hz. ~2.71 ticks per usec. Read the PM timer, add (2.71 * 5), loop on reading
> the PM timer until it reaches that, and (give or take) you have a 5us delay
> that does not depend on the TSC.

4MHz is not actually too bad at all, providing the reading overhead is
low