Re: asymmetric multiprocessing

[george anzinger <george@mvista.com>]

"Martin A. Brooks" wrote:
> 
> On Thu, 2001-12-20 at 14:13, Mark Hahn wrote:
> > not supported (and frowned upon by the spec).  the issue is TSC,
> > of course, and it's definitely not clear whether the normal case
> > (correctly configured SMP) should be burdoned by support for
> > mixed-clock chips.
> 
> I'm no expert on MP, hence I fail to see why differing clock speeds
> between CPUs should be a problem providing the system bus rates are
> constant. As each CPU would be rated differently as far as bogomips are
> concerned, couldn't the scheduler apply load accordingly?
> 
But then you are forcing the system to include cpu information each time
it reads the TSC.  For example, the TSC is currently used to provide the
sub jiffie resolution for the system clock.  If you also need to include
which cpu you run into a couple of problems: a) what if the start TSC is
read from a different cpu than the end TSC?  (In this case the start is
the last jiffie interrupt and the end is "now" when the time is being
requested.)  b.) The conversion to micro seconds depends on the clock
rate, i.e. the TSC clock rate.
-- 
George           george@mvista.com
High-res-timers: http://sourceforge.net/projects/high-res-timers/
Real time sched: http://sourceforge.net/projects/rtsched/