Re: [sched] [patch] migration-fixes-2.5.3-pre2-A1

[Manfred Spraul <manfred@colorfullife.com>]

>   */
>  #define SPURIOUS_APIC_VECTOR   0xff
>  #define ERROR_APIC_VECTOR      0xfe
>  #define INVALIDATE_TLB_VECTOR  0xfd
>  #define RESCHEDULE_VECTOR      0xfc
> -#define CALL_FUNCTION_VECTOR   0xfb
> +#define TASK_MIGRATION_VECTOR  0xfb
> +#define CALL_FUNCTION_VECTOR   0xfa
>  
Are you sure it's a good idea to have 6 interrupts at priority 15?
The local apic of the P6 has only one in-service entry and one holding
entry for each priority.

I'm not sure what happens if the entries overflow - either an interrupt
is lost or the message is resent.

<<<< Newest ia32 docu, vol3, chap. 7.6.4.3:
The P6 family and Pentium processor\x19's local APIC includes an in-service
entryy and a holding entry for each priority level. Optimally, software
should allocate no more than 2 interrupts per priority.
<<<<<

<<< Original PPro, Vol 3, chap 7.4.2:
The processor's local APIC includes an in-service entry and a holding
entry for each proirity level. To avoid losing interrupts, software
should allocate no more than 2 interrupts per priority.
<<<<<

--
	Manfred