Re: [BENCHMARK] Lmbench 2.5.54-mm2 (impressive improvements)

[Andrew Morton <akpm@digeo.com>]

Linus Torvalds wrote:
> 
> On Sat, 4 Jan 2003, Andrew Morton wrote:
> >
> > Looks like you're right.  The indications are that this change
> > has slowed context switches by ~5% on a PIII.   The backout patch
> > against 2.5.54 is below.  Testing on a P4 would be useful.
> 
> Hmm.. The backup patch doesn't handle single-stepping correctly: the
> eflags cleanup singlestep patch later in the sysenter sequence _depends_
> on the stack (and thus thread) being right on the very first in-kernel
> instruction.

Well that's just a straight `patch -R' of the patch which added the wrmsr's.

> That (along with benchmarking of system call numbers - the stack switch at
> system call run-time ends up being quite expensive on a P4) was what made
> me decide to do the traditional "write MSR in schedule" approach, even
> though I agree that it would be much nicer to not have to rewrite that
> stupid MSR all the time.
> 
> It doesn't show up on lmbench (insufficient precision), but your AIM9
> numbers are quite interesting. Are they stable?
> 

Seem to be, but more work is needed, including oprofiling.  Andi is doing
some P4 testing at present.