Re: [PATCH] improved boot time TSC synchronization

[Jim Houston <jim.houston@attbi.com>]

Jamie Lokier wrote:
> 
> It looks like not only can you synchronise with a certain accuracy,
> you can determine an upper bound on that accuracy (assuming the
> underlying CPU clocks are locked).
> 
> Maybe that figure could be put into /proc/cpuinfo?
> 
> As well as being an interesting value, it may be useful for programs
> to know the effective accuracy of `rdtsc'.
> 
> -- Jamie

Hi Jamie,

Yeah, I'd be glad to add the round-trip time to cpuinfo.  I see
this as a bogomips like metric.  It tells you how quickly you 
can move cache lines from chip to chip.

The patch currently prints the round-trip time and the max_delta.
On a Quad P4 Xeon, I got round-trip times in the 0.7 microsecond
range which is disappointing. The max_delta was almost always
zero cycles meaning that the feedback loop thinks that the TSC values
are perfectly synchronized.

Jim Houston - Concurrent Computer Corp.