Re: SMP broken on Dell PowerEdge 4100/200 under 2.6.0-testxx?

[Nick Piggin <piggin@cyberone.com.au>]

William Lee Irwin III wrote:

>On Sat, Dec 06, 2003 at 10:32:45AM +0800, Colin Coe wrote:
>
>>This indicates to me that the processing load is being evenly distributed
>>accross the two processes.  Under v2.6.0-testxx however, 'cat
>>/proc/interrupts' shows this:
>>[root@host root]# cat /proc/interrupts
>>           CPU0       CPU1
>>  0:     633122         30    IO-APIC-edge  timer
>>  1:        207              IO-APIC-edge  i8042
>>  2:                              XT-PIC  cascade
>>  4:         48          1    IO-APIC-edge  serial
>>  5:        449          1   IO-APIC-level  eth1
>> 10:        135          1   IO-APIC-level  aic7xxx
>> 11:       1447          1   IO-APIC-level  eth0
>> 12:         61              IO-APIC-edge  i8042
>> 14:                       IO-APIC-level  CS46XX
>> 15:      14982          1   IO-APIC-level  megaraid
>>
>
>2.6 does balancing across packages, not logical cpus, so this will
>happen and it will be largely harmless, except for what appears to
>be some kind of bug where it's stealing the timer from logical cpu 1.
>
>

Although in this case Colin has 2 PPro 200s.

Colin - process load should be evenly distributed between CPUs, and this
is generally the most important thing. Big networking loads (most commonly)
can put a lot of time into processing interrupts though.