From: Nuno Silva <nuno.silva@vgertech.com>
To: Jeff Garzik <jgarzik@pobox.com>
Cc: Linux Kernel <linux-kernel@vger.kernel.org>
Subject: Re: VIA on-chip RNG and crypto...
Date: Tue, 09 Dec 2003 03:58:16 +0000 [thread overview]
Message-ID: <3FD54858.3000009@vgertech.com> (raw)
In-Reply-To: <3FD50CD6.3070808@pobox.com>
Hi Jeff!
Jeff Garzik wrote:
>
> VIA has publicly posted the docs for the 'xstore' and 'xcrypt'
> instructions in their processors:
>
> http://www.via.com.tw/en/viac3/c3.jsp
>
> (grab "VIA Padlock {ACE|RNG} Programming Guide" down at the bottom)
>
You forgot the "journalist touch". To spike interest:
"PadLock ACE encrypts at rates of up to 12.5 Gigabits per second (Gbps)
with a 1GHz VIA C3 processor, more than eight times faster than the best
software AES implementation from a power hungry 3GHz Intel® Pentium® 4
processor based system that encrypts at a rate of a mere 1.5 Gbps."
25 times faster, clock by clock :)
Regards,
Nuno Silva
[...]
>
> P.S. In the interest of full disclosure, neither VIA nor my employer
> prompted me to write this.
>
The same here.
next prev parent reply other threads:[~2003-12-09 3:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-12-08 23:44 VIA on-chip RNG and crypto Jeff Garzik
2003-12-09 3:58 ` Nuno Silva [this message]
2003-12-09 4:13 ` coderman
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