From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S264443AbTLQSRP (ORCPT ); Wed, 17 Dec 2003 13:17:15 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S264496AbTLQSRO (ORCPT ); Wed, 17 Dec 2003 13:17:14 -0500 Received: from fmr99.intel.com ([192.55.52.32]:34272 "EHLO hermes-pilot.fm.intel.com") by vger.kernel.org with ESMTP id S264443AbTLQSRN (ORCPT ); Wed, 17 Dec 2003 13:17:13 -0500 Message-ID: <3FE09D22.2080206@intel.com> Date: Wed, 17 Dec 2003 20:14:58 +0200 From: Vladimir Kondratiev User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.6b) Gecko/20031210 X-Accept-Language: en-us, en, ru MIME-Version: 1.0 To: Dan Hopper CC: Linus Torvalds , Linux Kernel Development Subject: Re: PCI Express support for 2.4 kernel References: <3FDDACA9.1050600@intel.com> <1071494155.5223.3.camel@laptop.fenrus.com> <3FDDBDFE.5020707@intel.com> <3FDEDC77.9010203@intel.com> <3FDFF81F.7040309@intel.com> <20031217174427.GA31730@obiwan.dummynet> In-Reply-To: <20031217174427.GA31730@obiwan.dummynet> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Dan, all your statements are correct. Indeed, all PCI devices works without extra knowledge about PCI-E. I have nothing to add. Vladimir. Dan Hopper wrote: >Linus Torvalds remarked: > > >>On Wed, 17 Dec 2003, Geert Uytterhoeven wrote: >> >> >>>For the record: PCI Express is _not_ PCI-X. >>> >>> >>Ok, but "PCI Express" is too damn long to write, so we'll have to have >>_some_ sane name for it without typing for half an hour. >> >> > >FWIW, "PCI-E" is in common use in these parts. > >Also, wrt the config space backward compatibility issue, it is my >understanding that the PCI-E root complex and PCI-E devices can be >enumerated and used successfully with no software changes, within >the constraints of PCI. The BIOS or OS should be able to enumerate >devices, probe BARs and assign resources, perform basic error >handling, etc. without any PCI-E-specific changes. > >The hardware is required to be able to initialize PCI-E links, set >things up to sane states, and so forth without software assistance >in order to make this magic happen. It would be interesting to hear >from Vladimir as to whether or not this is happening with his PCI-E >test system. > >Having said all that, it's obviously preferable to end up with >native OS and BIOS support for the PCI-E extended configuration >space, extra error reporting mechanisms, etc. Native PCI-E devices >hanging off the bus somewhere might not work (or, at least, work >well) with an OS that doesn't grok the PCI-E extensions. > >Dan > >