[PATCH] arm64: dts: ti: k3-j721s2-som-p0: add bootph-pre-ram property to pmic@4c

Thomas Richard (TI)
2026-04-28T08:53:51Z

On j721s2, pmic@4c is needed to exit the DDR from retention after
suspend-to-ram. Add bootph-pre-ram property to make pmic@4c available to
the bootloader in the phase that sets up the DDR.

Signed-off-by: Thomas Richard (TI) <thomas.richard@bootlin.com>
---
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
index 12a38dd1514b..a19e535f4946 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
@@ -250,6 +250,7 @@ buckb1: buck1 {
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
+ bootph-pre-ram;
};

buckb2: buck2 {

---
base-commit: 59b04cb2325c07ddc1cc7d984bd8c8f89f161746
change-id: 20260427-k3-j721s2-som-bootph-pre-ram-pmic-4c-744fb90b05a3

Best regards,
--
Thomas Richard (TI) <thomas.richard@bootlin.com>