From: "Xuyang Dong" <dongxuyang@eswincomputing.com>
To: "Conor Dooley" <conor@kernel.org>
Cc: "Krzysztof Kozlowski" <krzk@kernel.org>,
ukleinek@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, ben-linux@fluff.org,
ben.dooks@codethink.co.uk, p.zabel@pengutronix.de,
linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, ningyu@eswincomputing.com,
linmin@eswincomputing.com, xuxiang@eswincomputing.com,
wangguosheng@eswincomputing.com, pinkesh.vaghela@einfochips.com
Subject: Re: Re: Re: [PATCH v4 1/2] dt-bindings: pwm: dwc: add reset optional
Date: Fri, 17 Apr 2026 11:11:51 +0800 (GMT+08:00) [thread overview]
Message-ID: <3b2e80d5.55a5.19d996c6821.Coremail.dongxuyang@eswincomputing.com> (raw)
In-Reply-To: <20260416-flashcard-shadily-a0ddd2f12ff8@spud>
> > > > >
> > > > > The DesignWare PWM includes separate reset signals dedicated to each clock
> > > > > domain:
> > > > > The presetn signal resets logic in pclk domain.
> > > > > The timer_N_resetn signal resets logic in the timer_N_clk domain.
> > > > > The resets are active-low.
> > > > >
> > > > > Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
> > > >
> > > > This commit implies that your hardware differs from existing devices,
> > > > I think you should add a device-specific compatible.
> > > >
> >
> > Hi Conor and Krzysztof,
> >
> > The DesignWare PWM Databook for 2.13a says: "The DW_apb_timers includes
> > separate reset signals dedicated to each clock domain". They are:
> > The presetn signal resets logic in pclk domain (i.e., the bus clock in DT).
> > The timer_N_resetn signal resets logic in the timer_N_clk domain (i.e.,
> > the timer clock in DT).
> >
> > These reset signals are optional; it is up to the designer's
> > implementation.
>
> Right, and it's that "designer's implementation" that warrants a
> device-specific compatible.
>
Hi Conor,
The YAML update for the new device-specific compatible is as follows:
properties:
compatible:
oneOf:
- const: snps,dw-apb-timers-pwm2
- items:
- enum:
- snps,dw-apb-timers-pwm-2.13a
- const: snps,dw-apb-timers-pwm2
reg:
maxItems: 1
"#pwm-cells":
const: 3
clocks:
items:
- description: Interface bus clock
- description: PWM reference clock
clock-names:
items:
- const: bus
- const: timer
resets:
items:
- description: Interface bus reset
- description: PWM timer logic reset
snps,pwm-number:
$ref: /schemas/types.yaml#/definitions/uint32
description: The number of PWM channels configured for this instance
enum: [1, 2, 3, 4, 5, 6, 7, 8]
required:
- compatible
- reg
- clocks
- clock-names
allOf:
- $ref: pwm.yaml#
- if:
properties:
compatible:
contains:
const: snps,dw-apb-timers-pwm-2.13a
then:
required:
- resets
In your opinion, is this modification accurate?
Best regards,
Xuyang Dong
> >
> > According to [1], the applied YAML is also based on 2.13a, so our
> > hardware is the same as the existing devices. It's just that these two
> > reset signals were missing from the original YAML binding.
> >
> > [1] https://lore.kernel.org/linux-pwm/8bb5103d-803e-90d2-fd93-132bb2aac2d6@sifive.com/
> >
> > > > > ---
> > > > > .../devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml | 3 +++
> > > > > 1 file changed, 3 insertions(+)
> > > > >
> > > > > diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> > > > > index 7523a89a1773..a8bbad0360f8 100644
> > > > > --- a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> > > > > +++ b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> > > > > @@ -43,6 +43,9 @@ properties:
> > > > > - const: bus
> > > > > - const: timer
> > > > >
> > > > > + resets:
> > > > > + maxItems: 2
> > >
> > > And this should really be listed with description, because order is
> > > fixed.
> > >
> >
> > The description of resets will be listed in next version.
> >
> > Best regards,
> > Xuyang Dong
next prev parent reply other threads:[~2026-04-17 3:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 9:49 [PATCH v4 0/2] Update designware pwm driver dongxuyang
2026-04-15 9:50 ` [PATCH v4 1/2] dt-bindings: pwm: dwc: add reset optional dongxuyang
2026-04-15 15:09 ` Conor Dooley
2026-04-16 8:24 ` Krzysztof Kozlowski
2026-04-16 9:38 ` Xuyang Dong
2026-04-16 15:29 ` Conor Dooley
2026-04-17 3:11 ` Xuyang Dong [this message]
2026-04-17 15:13 ` Conor Dooley
2026-04-16 19:53 ` Uwe Kleine-König
2026-04-17 3:13 ` Xuyang Dong
2026-04-15 9:50 ` [PATCH v4 2/2] pwm: dwc: add of/platform support dongxuyang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3b2e80d5.55a5.19d996c6821.Coremail.dongxuyang@eswincomputing.com \
--to=dongxuyang@eswincomputing.com \
--cc=ben-linux@fluff.org \
--cc=ben.dooks@codethink.co.uk \
--cc=conor+dt@kernel.org \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=krzk@kernel.org \
--cc=linmin@eswincomputing.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=ningyu@eswincomputing.com \
--cc=p.zabel@pengutronix.de \
--cc=pinkesh.vaghela@einfochips.com \
--cc=robh@kernel.org \
--cc=ukleinek@kernel.org \
--cc=wangguosheng@eswincomputing.com \
--cc=xuxiang@eswincomputing.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox