From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8869C3D16EF for ; Mon, 20 Jul 2026 08:52:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784537574; cv=none; b=YTUFH1FzFIt+BYvOXHXimivSe2kEDLWZKxdq/jFzfGfau16b1VnZe7hvztxny+M5+Gxq84iIhHpM2l53CYcc1aMlYkbEPFfY1GB9FOEHHUQN31+BjE4dUeK0lW8Dly46HojZB34zUcUsKbOvg1un+oQ2nWTa+j3pAmKXJfTgTms= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784537574; c=relaxed/simple; bh=I0hFWA+ZRsc/lmkkcYdIeHYF6Zp3Xz2xH+Q9PT8A3C8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=D1pv8rDDOj85TH0py3nT3P8Weqk3DydgdU1YjTNAqxDqa3MhiZKjj4FL/VpyYjdEXoDaJhjZ1Z16i5eCRKDyQBuoKw7Dy0vVMBv1xfq+Yb/hwYedrTPWfna8K8mVCMQF1ZNVA698f84fiLxy1TzcBNo0fvYarv7BKyzAhEifn3s= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RkGFS+X2; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RkGFS+X2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9A4FF1F000E9; Mon, 20 Jul 2026 08:52:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784537570; bh=uMdFkJjALJ8v6eAD0PSr6qmC4sXRyvVhOCTSzcCRIe8=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=RkGFS+X2F3FxBcWnYY9RMghI9AAm7tW8q7mQHZgES6WZA0cZaCEZiPDOiUkHdBjHH 93i5Ca4u9iCrW4pQIcLvp5kahxFZrVU23a2d6sJF4FRrBgrJED6qRg+dkCs8cdk6GJ /9LWl1KVQVLbOAZBEViCc2LoF9/XhUr+qFLR2ftFIv0uTN4LOJREtJ/ldIA8ijcoP3 8rA8BSlSwgY71IMHoFopl6MMc0oedOra2wEAKsUQV83VzaHRJDTxH3Csmi8S67dZvh nhJ463NIC6Q4gB2VagWWX616r9A1iatuPyBnEiqmLhugedWv2xvagklO+NcedvSRqE yi2PS5/eSahkg== Message-ID: <3c2968fb-09c3-47d0-8ff9-9def25d37526@kernel.org> Date: Mon, 20 Jul 2026 09:52:45 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] riscv/mm: use physical alignment for vmemmap_start_pfn To: Jiakai Xu , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Guo Ren , Mike Rapoport , Vishal Moola , Albert Ou , Alexandre Ghiti , Andrew Morton , Junhui Liu , Kiryl Shutsemau , Muchun Song , Nam Cao , Palmer Dabbelt , Paul Walmsley , Vivian Wang References: <20260716115326.3466926-1-xujiakai2025@iscas.ac.cn> From: "David Hildenbrand (Arm)" Content-Language: en-US Autocrypt: addr=david@kernel.org; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzS5EYXZpZCBIaWxk ZW5icmFuZCAoQ3VycmVudCkgPGRhdmlkQGtlcm5lbC5vcmc+wsGQBBMBCAA6AhsDBQkmWAik AgsJBBUKCQgCFgICHgUCF4AWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaYJt/AIZAQAKCRBN 3hD3AP+DWriiD/9BLGEKG+N8L2AXhikJg6YmXom9ytRwPqDgpHpVg2xdhopoWdMRXjzOrIKD g4LSnFaKneQD0hZhoArEeamG5tyo32xoRsPwkbpIzL0OKSZ8G6mVbFGpjmyDLQCAxteXCLXz ZI0VbsuJKelYnKcXWOIndOrNRvE5eoOfTt2XfBnAapxMYY2IsV+qaUXlO63GgfIOg8RBaj7x 3NxkI3rV0SHhI4GU9K6jCvGghxeS1QX6L/XI9mfAYaIwGy5B68kF26piAVYv/QZDEVIpo3t7 /fjSpxKT8plJH6rhhR0epy8dWRHk3qT5tk2P85twasdloWtkMZ7FsCJRKWscm1BLpsDn6EQ4 jeMHECiY9kGKKi8dQpv3FRyo2QApZ49NNDbwcR0ZndK0XFo15iH708H5Qja/8TuXCwnPWAcJ DQoNIDFyaxe26Rx3ZwUkRALa3iPcVjE0//TrQ4KnFf+lMBSrS33xDDBfevW9+Dk6IISmDH1R HFq2jpkN+FX/PE8eVhV68B2DsAPZ5rUwyCKUXPTJ/irrCCmAAb5Jpv11S7hUSpqtM/6oVESC 3z/7CzrVtRODzLtNgV4r5EI+wAv/3PgJLlMwgJM90Fb3CB2IgbxhjvmB1WNdvXACVydx55V7 LPPKodSTF29rlnQAf9HLgCphuuSrrPn5VQDaYZl4N/7zc2wcWM7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20260716115326.3466926-1-xujiakai2025@iscas.ac.cn> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 7/16/26 12:53, Jiakai Xu wrote: > RISC-V computes vmemmap_start_pfn by rounding phys_ram_base down to > VMEMMAP_ADDR_ALIGN. That alignment must therefore be expressed in the > physical-address domain. > > Commit 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size") > attempted to account for the maximal folio alignment by feeding > MAX_FOLIO_VMEMMAP_ALIGN directly into VMEMMAP_ADDR_ALIGN. However, > MAX_FOLIO_VMEMMAP_ALIGN is measured in bytes of struct page storage, > whereas VMEMMAP_ADDR_ALIGN is used to align a physical address. So in sparse_init(), we check VM_WARN_ON_ONCE(!IS_ALIGNED((unsigned long) pfn_to_page(0), MAX_FOLIO_VMEMMAP_ALIGN)); > > The mask-based compound_info encoding requires pfn_to_page(0) to be > naturally aligned to MAX_FOLIO_VMEMMAP_ALIGN. Commit 9f94db4c7eaa > ("mm/sparse: check memmap alignment for compound_info_has_mask()") > added a check for that requirement and exposed the unit mismatch on > systems such as QEMU virt, where the DRAM base is not aligned to > MAX_FOLIO_NR_PAGES * PAGE_SIZE. > > Convert MAX_FOLIO_VMEMMAP_ALIGN to the equivalent physical alignment > before using it in VMEMMAP_ADDR_ALIGN. This keeps the existing > round_down() logic while making the resulting vmemmap base satisfy the > mask-alignment requirement. > > Fixes: 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size") > Signed-off-by: Jiakai Xu > Assisted-by: YuanSheng:DeepSeek-V4-Flash > --- > arch/riscv/mm/init.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c > index 3e450890be07..422efa11824b 100644 > --- a/arch/riscv/mm/init.c > +++ b/arch/riscv/mm/init.c > @@ -63,7 +63,8 @@ EXPORT_SYMBOL(phys_ram_base); > > #ifdef CONFIG_SPARSEMEM_VMEMMAP > #define VMEMMAP_ADDR_ALIGN max(1ULL << SECTION_SIZE_BITS, \ > - MAX_FOLIO_VMEMMAP_ALIGN) > + PFN_PHYS(MAX_FOLIO_VMEMMAP_ALIGN / \ > + sizeof(struct page))) I'm still confused, but I think it might be more elegant to make this #define VMEMMAP_PFN_ALIGN max(PAGES_PER_SECTION, \ MAX_FOLIO_VMEMMAP_ALIGN / sizeof(struct page)) And then do round_down(PHYS_PFN(phys_ram_base), VMEMMAP_PFN_ALIGN); -- Cheers, David