* [BK PATCHES] 2.6.x libata update
@ 2004-02-13 18:43 Jeff Garzik
2004-02-13 19:28 ` Martin Schlemmer
0 siblings, 1 reply; 9+ messages in thread
From: Jeff Garzik @ 2004-02-13 18:43 UTC (permalink / raw)
To: akpm, torvalds; +Cc: linux-kernel
Please do a
bk pull bk://gkernel.bkbits.net/libata-2.5
This will update the following files:
drivers/scsi/ata_piix.c | 6 +++---
drivers/scsi/libata-core.c | 40 ++++++++++++++++++++++++++++++++++++++--
drivers/scsi/libata-scsi.c | 4 ++--
drivers/scsi/libata.h | 6 +++---
drivers/scsi/sata_promise.c | 2 +-
drivers/scsi/sata_via.c | 4 ++--
include/linux/ata.h | 4 ++--
include/linux/libata.h | 4 ++--
8 files changed, 53 insertions(+), 17 deletions(-)
through these ChangeSets:
<jgarzik@redhat.com> (04/02/13 1.1635)
Bump libata, ata_piix to version 1.0.
Also update copyrights for 2004.
<jgarzik@redhat.com> (04/02/13 1.1634)
[libata] catch, and ack, spurious DMA interrupts
Hardware issue on Intel ICH5 requires an additional ack sequence
over and above the normal IDE DMA interrupt ack requirements. Issue
described in post to freebsd list:
http://www.mail-archive.com/freebsd-stable@freebsd.org/msg58421.html
Since the bug workaround only requires a single additional PIO or
MMIO read in the interrupt handler, it is applied to all chipsets
using the standard libata interrupt handler.
Credit for research the issue, creating the patch, and testing the
patch all go to Jon Burgess.
diff -Nru a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c
--- a/drivers/scsi/ata_piix.c Fri Feb 13 13:40:32 2004
+++ b/drivers/scsi/ata_piix.c Fri Feb 13 13:40:32 2004
@@ -3,8 +3,8 @@
ata_piix.c - Intel PATA/SATA controllers
- Copyright 2003 Red Hat Inc
- Copyright 2003 Jeff Garzik
+ Copyright 2003-2004 Red Hat Inc
+ Copyright 2003-2004 Jeff Garzik
Copyright header from piix.c:
@@ -28,7 +28,7 @@
#include <linux/libata.h>
#define DRV_NAME "ata_piix"
-#define DRV_VERSION "0.95"
+#define DRV_VERSION "1.00"
enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
diff -Nru a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
--- a/drivers/scsi/libata-core.c Fri Feb 13 13:40:32 2004
+++ b/drivers/scsi/libata-core.c Fri Feb 13 13:40:32 2004
@@ -1,8 +1,8 @@
/*
libata-core.c - helper library for ATA
- Copyright 2003 Red Hat, Inc. All rights reserved.
- Copyright 2003 Jeff Garzik
+ Copyright 2003-2004 Red Hat, Inc. All rights reserved.
+ Copyright 2003-2004 Jeff Garzik
The contents of this file are subject to the Open
Software License version 1.1 that can be found at
@@ -2386,6 +2386,41 @@
}
/**
+ * ata_chk_spurious_int - Check for spurious interrupts
+ * @ap: port to which command is being issued
+ *
+ * Examines the DMA status registers and clears
+ * unexpected interrupts. Created to work around
+ * hardware bug on Intel ICH5, but is applied to all
+ * chipsets using the standard irq handler, just for safety.
+ * If the bug is not present, this is simply a single
+ * PIO or MMIO read addition to the irq handler.
+ *
+ * LOCKING:
+ */
+static inline void ata_chk_spurious_int(struct ata_port *ap) {
+ int host_stat;
+
+ if (ap->flags & ATA_FLAG_MMIO) {
+ void *mmio = (void *) ap->ioaddr.bmdma_addr;
+ host_stat = readb(mmio + ATA_DMA_STATUS);
+ } else
+ host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
+
+ if ((host_stat & (ATA_DMA_INTR | ATA_DMA_ERR | ATA_DMA_ACTIVE)) == ATA_DMA_INTR) {
+ if (ap->flags & ATA_FLAG_MMIO) {
+ void *mmio = (void *) ap->ioaddr.bmdma_addr;
+ writeb(host_stat & ~ATA_DMA_ERR, mmio + ATA_DMA_STATUS);
+ } else
+ outb(host_stat & ~ATA_DMA_ERR, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
+
+ DPRINTK("ata%u: Caught spurious interrupt, status 0x%X\n", ap->id, host_stat);
+ udelay(1);
+ }
+}
+
+
+/**
* ata_interrupt -
* @irq:
* @dev_instance:
@@ -2417,6 +2452,7 @@
qc = ata_qc_from_tag(ap, ap->active_tag);
if (qc && ((qc->flags & ATA_QCFLAG_POLL) == 0))
handled += ata_host_intr(ap, qc);
+ ata_chk_spurious_int(ap);
}
}
diff -Nru a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c
--- a/drivers/scsi/libata-scsi.c Fri Feb 13 13:40:32 2004
+++ b/drivers/scsi/libata-scsi.c Fri Feb 13 13:40:32 2004
@@ -1,8 +1,8 @@
/*
libata-scsi.c - helper library for ATA
- Copyright 2003 Red Hat, Inc. All rights reserved.
- Copyright 2003 Jeff Garzik
+ Copyright 2003-2004 Red Hat, Inc. All rights reserved.
+ Copyright 2003-2004 Jeff Garzik
The contents of this file are subject to the Open
Software License version 1.1 that can be found at
diff -Nru a/drivers/scsi/libata.h b/drivers/scsi/libata.h
--- a/drivers/scsi/libata.h Fri Feb 13 13:40:32 2004
+++ b/drivers/scsi/libata.h Fri Feb 13 13:40:32 2004
@@ -1,8 +1,8 @@
/*
libata.h - helper library for ATA
- Copyright 2003 Red Hat, Inc. All rights reserved.
- Copyright 2003 Jeff Garzik
+ Copyright 2003-2004 Red Hat, Inc. All rights reserved.
+ Copyright 2003-2004 Jeff Garzik
The contents of this file are subject to the Open
Software License version 1.1 that can be found at
@@ -26,7 +26,7 @@
#define __LIBATA_H__
#define DRV_NAME "libata"
-#define DRV_VERSION "0.81" /* must be exactly four chars */
+#define DRV_VERSION "1.00" /* must be exactly four chars */
struct ata_scsi_args {
struct ata_port *ap;
diff -Nru a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c
--- a/drivers/scsi/sata_promise.c Fri Feb 13 13:40:32 2004
+++ b/drivers/scsi/sata_promise.c Fri Feb 13 13:40:32 2004
@@ -1,7 +1,7 @@
/*
* sata_promise.c - Promise SATA
*
- * Copyright 2003 Red Hat, Inc.
+ * Copyright 2003-2004 Red Hat, Inc.
*
* The contents of this file are subject to the Open
* Software License version 1.1 that can be found at
diff -Nru a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c
--- a/drivers/scsi/sata_via.c Fri Feb 13 13:40:32 2004
+++ b/drivers/scsi/sata_via.c Fri Feb 13 13:40:32 2004
@@ -1,8 +1,8 @@
/*
sata_via.c - VIA Serial ATA controllers
- Copyright 2003 Red Hat, Inc. All rights reserved.
- Copyright 2003 Jeff Garzik
+ Copyright 2003-2004 Red Hat, Inc. All rights reserved.
+ Copyright 2003-2004 Jeff Garzik
The contents of this file are subject to the Open
Software License version 1.1 that can be found at
diff -Nru a/include/linux/ata.h b/include/linux/ata.h
--- a/include/linux/ata.h Fri Feb 13 13:40:32 2004
+++ b/include/linux/ata.h Fri Feb 13 13:40:32 2004
@@ -1,7 +1,7 @@
/*
- Copyright 2003 Red Hat, Inc. All rights reserved.
- Copyright 2003 Jeff Garzik
+ Copyright 2003-2004 Red Hat, Inc. All rights reserved.
+ Copyright 2003-2004 Jeff Garzik
The contents of this file are subject to the Open
Software License version 1.1 that can be found at
diff -Nru a/include/linux/libata.h b/include/linux/libata.h
--- a/include/linux/libata.h Fri Feb 13 13:40:32 2004
+++ b/include/linux/libata.h Fri Feb 13 13:40:32 2004
@@ -1,6 +1,6 @@
/*
- Copyright 2003 Red Hat, Inc. All rights reserved.
- Copyright 2003 Jeff Garzik
+ Copyright 2003-2004 Red Hat, Inc. All rights reserved.
+ Copyright 2003-2004 Jeff Garzik
The contents of this file are subject to the Open
Software License version 1.1 that can be found at
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
2004-02-13 18:43 [BK PATCHES] 2.6.x libata update Jeff Garzik
@ 2004-02-13 19:28 ` Martin Schlemmer
2004-02-13 21:03 ` Jeff Garzik
0 siblings, 1 reply; 9+ messages in thread
From: Martin Schlemmer @ 2004-02-13 19:28 UTC (permalink / raw)
To: Jeff Garzik; +Cc: akpm, torvalds, Linux Kernel Mailing Lists
[-- Attachment #1: Type: text/plain, Size: 912 bytes --]
On Fri, 2004-02-13 at 20:43, Jeff Garzik wrote:
Hi
> <jgarzik@redhat.com> (04/02/13 1.1634)
> [libata] catch, and ack, spurious DMA interrupts
>
> Hardware issue on Intel ICH5 requires an additional ack sequence
> over and above the normal IDE DMA interrupt ack requirements. Issue
> described in post to freebsd list:
> http://www.mail-archive.com/freebsd-stable@freebsd.org/msg58421.html
>
> Since the bug workaround only requires a single additional PIO or
> MMIO read in the interrupt handler, it is applied to all chipsets
> using the standard libata interrupt handler.
>
> Credit for research the issue, creating the patch, and testing the
> patch all go to Jon Burgess.
>
Did you miss the mail I sent about this locking my box in under
20-30 mins? It still looks the same as the previous one ....
Thanks,
--
Martin Schlemmer
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
2004-02-13 19:28 ` Martin Schlemmer
@ 2004-02-13 21:03 ` Jeff Garzik
2004-02-14 18:29 ` Martin Schlemmer
0 siblings, 1 reply; 9+ messages in thread
From: Jeff Garzik @ 2004-02-13 21:03 UTC (permalink / raw)
To: Martin Schlemmer; +Cc: akpm, torvalds, Linux Kernel Mailing Lists
Martin Schlemmer wrote:
> On Fri, 2004-02-13 at 20:43, Jeff Garzik wrote:
>
> Hi
>
>
>><jgarzik@redhat.com> (04/02/13 1.1634)
>> [libata] catch, and ack, spurious DMA interrupts
>>
>> Hardware issue on Intel ICH5 requires an additional ack sequence
>> over and above the normal IDE DMA interrupt ack requirements. Issue
>> described in post to freebsd list:
>> http://www.mail-archive.com/freebsd-stable@freebsd.org/msg58421.html
>>
>> Since the bug workaround only requires a single additional PIO or
>> MMIO read in the interrupt handler, it is applied to all chipsets
>> using the standard libata interrupt handler.
>>
>> Credit for research the issue, creating the patch, and testing the
>> patch all go to Jon Burgess.
>>
>
>
> Did you miss the mail I sent about this locking my box in under
> 20-30 mins? It still looks the same as the previous one ....
Yes, I did. Can you test 2.6.3-rc2 + this patch?
Jeff
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
2004-02-13 21:03 ` Jeff Garzik
@ 2004-02-14 18:29 ` Martin Schlemmer
2004-02-14 20:32 ` Jeff Garzik
0 siblings, 1 reply; 9+ messages in thread
From: Martin Schlemmer @ 2004-02-14 18:29 UTC (permalink / raw)
To: Jeff Garzik; +Cc: akpm, torvalds, Linux Kernel Mailing Lists, Jon Smirl
[-- Attachment #1: Type: text/plain, Size: 1365 bytes --]
On Fri, 2004-02-13 at 23:03, Jeff Garzik wrote:
> Martin Schlemmer wrote:
> > On Fri, 2004-02-13 at 20:43, Jeff Garzik wrote:
> >
> > Hi
> >
> >
> >><jgarzik@redhat.com> (04/02/13 1.1634)
> >> [libata] catch, and ack, spurious DMA interrupts
> >>
> >> Hardware issue on Intel ICH5 requires an additional ack sequence
> >> over and above the normal IDE DMA interrupt ack requirements. Issue
> >> described in post to freebsd list:
> >> http://www.mail-archive.com/freebsd-stable@freebsd.org/msg58421.html
> >>
> >> Since the bug workaround only requires a single additional PIO or
> >> MMIO read in the interrupt handler, it is applied to all chipsets
> >> using the standard libata interrupt handler.
> >>
> >> Credit for research the issue, creating the patch, and testing the
> >> patch all go to Jon Burgess.
> >>
> >
> >
> > Did you miss the mail I sent about this locking my box in under
> > 20-30 mins? It still looks the same as the previous one ....
>
>
> Yes, I did. Can you test 2.6.3-rc2 + this patch?
>
Yep, it still breaks it. I get a dma timeout on heavy disk access,
and then things start to freeze (or do not start at all). Seems
Jon is hitting the same issue with -bk4.
If you need debugging/whatever, just let me know what to do
Thanks,
--
Martin Schlemmer
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
2004-02-14 18:29 ` Martin Schlemmer
@ 2004-02-14 20:32 ` Jeff Garzik
2004-02-15 8:18 ` Martin Schlemmer
0 siblings, 1 reply; 9+ messages in thread
From: Jeff Garzik @ 2004-02-14 20:32 UTC (permalink / raw)
To: Martin Schlemmer; +Cc: akpm, torvalds, Linux Kernel Mailing Lists, Jon Smirl
Martin Schlemmer wrote:
> Yep, it still breaks it. I get a dma timeout on heavy disk access,
> and then things start to freeze (or do not start at all). Seems
> Jon is hitting the same issue with -bk4.
Thanks for re-verifying. The buggy patch is now reverted upstream, and
I'll be looking into another way to fix the "too many interrupts on
ICH5" problem.
Jeff
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
2004-02-14 20:32 ` Jeff Garzik
@ 2004-02-15 8:18 ` Martin Schlemmer
2004-02-15 15:17 ` Jon Smirl
0 siblings, 1 reply; 9+ messages in thread
From: Martin Schlemmer @ 2004-02-15 8:18 UTC (permalink / raw)
To: Jeff Garzik; +Cc: akpm, torvalds, Linux Kernel Mailing Lists, Jon Smirl
[-- Attachment #1: Type: text/plain, Size: 1978 bytes --]
On Sat, 2004-02-14 at 22:32, Jeff Garzik wrote:
> Martin Schlemmer wrote:
> > Yep, it still breaks it. I get a dma timeout on heavy disk access,
> > and then things start to freeze (or do not start at all). Seems
> > Jon is hitting the same issue with -bk4.
>
> Thanks for re-verifying. The buggy patch is now reverted upstream, and
> I'll be looking into another way to fix the "too many interrupts on
> ICH5" problem.
>
Stupid question - its not maybe fixed in later revisions of the
controller (also those this breaks)? I never had the heavy interrupts
problem some seems to have ...
--
# cat /proc/interrupts
CPU0 CPU1
0: 64547502 64536877 IO-APIC-edge timer
2: 0 0 XT-PIC cascade
8: 6702 945 IO-APIC-edge rtc
9: 0 0 IO-APIC-level acpi
14: 244 142 IO-APIC-edge ide0
15: 35 62 IO-APIC-edge ide1
169: 1287568 1399519 IO-APIC-level libata, uhci_hcd, eth0
177: 746886 747222 IO-APIC-level Intel ICH5
185: 5637855 5624744 IO-APIC-level uhci_hcd, uhci_hcd, nvidia
193: 0 0 IO-APIC-level uhci_hcd
201: 0 0 IO-APIC-level ehci_hcd
NMI: 0 0
LOC: 129049693 129049832
ERR: 0
MIS: 0
--
(yes, with the patch it happens without nvidia as well)
--
Bus 0, device 31, function 1:
IDE interface: Intel Corp. 82801EB Ultra ATA Storage Controller (rev 2).
IRQ 169.
I/O at 0xfc00 [0xfc0f].
Non-prefetchable 32 bit memory at 0x40000000 [0x400003ff].
Bus 0, device 31, function 2:
IDE interface: Intel Corp. 82801EB Ultra ATA Storage Controller (rev 2).
IRQ 169.
I/O at 0xefe0 [0xefe7].
I/O at 0xefac [0xefaf].
I/O at 0xefa0 [0xefa7].
I/O at 0xefa8 [0xefab].
I/O at 0xef90 [0xef9f].
--
--
Martin Schlemmer
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
2004-02-15 8:18 ` Martin Schlemmer
@ 2004-02-15 15:17 ` Jon Smirl
0 siblings, 0 replies; 9+ messages in thread
From: Jon Smirl @ 2004-02-15 15:17 UTC (permalink / raw)
To: Martin Schlemmer, Jeff Garzik; +Cc: Linux Kernel Mailing Lists, Jon Smirl
The patch that was undone would take my box down within five minutes of a boot.
All it took was some kernel compiles. I'm running a RAID-1 arrary between the
SATA and ATA drives.
=====
Jon Smirl
jonsmirl@yahoo.com
__________________________________
Do you Yahoo!?
Yahoo! Finance: Get your refund fast by filing online.
http://taxes.yahoo.com/filing.html
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
@ 2004-02-15 16:07 Jon Smirl
0 siblings, 0 replies; 9+ messages in thread
From: Jon Smirl @ 2004-02-15 16:07 UTC (permalink / raw)
To: Jeff Garzik; +Cc: Linux Kernel Mailing Lists
I'm running RAID-1 on ICH5, 82801EB. One SATA and one IDE drive in array.
Hyperthread enabled CPU.
Is this right? My ATA drive is on ide0. Because of the RAID my IDE and SATA
drives should have about the same number of interrupts. But half of my IDE
interrupts are showing up on ide1, on CPU #1. There shouldn't be any interrupts
showing up on CPU#1 with hyperthreading.
[root@smirl proc]# cat interrupts
CPU0 CPU1
0: 2875672 0 IO-APIC-edge timer
1: 1917 0 IO-APIC-edge i8042
2: 0 0 XT-PIC cascade
8: 1 0 IO-APIC-edge rtc
9: 0 0 IO-APIC-level acpi
12: 50 0 IO-APIC-edge i8042
14: 65443 0 IO-APIC-edge ide0
15: 59174 1 IO-APIC-edge ide1
16: 0 0 IO-APIC-level uhci_hcd, uhci_hcd
17: 688 0 IO-APIC-level Intel ICH5
18: 163152 0 IO-APIC-level libata, uhci_hcd, eth0
19: 54864 0 IO-APIC-level uhci_hcd
22: 3 0 IO-APIC-level ohci1394
23: 0 0 IO-APIC-level ehci_hcd
NMI: 0 0
LOC: 2875702 2875706
ERR: 0
MIS: 0
=====
Jon Smirl
jonsmirl@yahoo.com
__________________________________
Do you Yahoo!?
Yahoo! Finance: Get your refund fast by filing online.
http://taxes.yahoo.com/filing.html
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [BK PATCHES] 2.6.x libata update
@ 2004-02-15 16:11 Jon Smirl
0 siblings, 0 replies; 9+ messages in thread
From: Jon Smirl @ 2004-02-15 16:11 UTC (permalink / raw)
To: Jeff Garzik; +Cc: Linux Kernel Mailing Lists
>Is this right? My ATA drive is on ide0. Because of the RAID my IDE and SATA
drives should >have about the same number of interrupts. But half of my IDE
interrupts are showing up on >ide1, on CPU #1. There shouldn't be any interrupts
showing up on CPU#1 with hyperthreading.
I didn't read that right, half are on ide0 and half on ide1 and only one on CPU
#1. My drive is on ide0, is it right to get half on ide1?
=====
Jon Smirl
jonsmirl@yahoo.com
__________________________________
Do you Yahoo!?
Yahoo! Finance: Get your refund fast by filing online.
http://taxes.yahoo.com/filing.html
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2004-02-15 16:11 UTC | newest]
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2004-02-13 18:43 [BK PATCHES] 2.6.x libata update Jeff Garzik
2004-02-13 19:28 ` Martin Schlemmer
2004-02-13 21:03 ` Jeff Garzik
2004-02-14 18:29 ` Martin Schlemmer
2004-02-14 20:32 ` Jeff Garzik
2004-02-15 8:18 ` Martin Schlemmer
2004-02-15 15:17 ` Jon Smirl
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2004-02-15 16:07 Jon Smirl
2004-02-15 16:11 Jon Smirl
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