From: Timothy Miller <miller@techsource.com>
To: "Nakajima, Jun" <jun.nakajima@intel.com>
Cc: richard.brunner@amd.com, linux-kernel@vger.kernel.org
Subject: Re: Intel vs AMD64
Date: Thu, 26 Feb 2004 14:18:25 -0500 [thread overview]
Message-ID: <403E4681.20603@techsource.com> (raw)
In-Reply-To: <7F740D512C7C1046AB53446D37200173EA28A5@scsmsx402.sc.intel.com>
Nakajima, Jun wrote:
> Thanks for the clarification.
>
> Yes, "implementation specific" is one of the differences between IA-32e
> and AMD64, i.e. that behavior is architecturally defined on AMD64, but
> on IA-32e (as I posted):
> Near branch with 66H prefix:
> As documented in PRM the behavior is implementation specific and
> should
> avoid using 66H prefix on near branches.
In other words, Intel's implementation deviates from the architecture as
defined by AMD. So it's not 100% compatible. I just want this point to
be clear.
If these sorts of branches are common enough (and I suspect they are),
then this sort of deviation could have a notable code-size (and L1)
impact on code which is compiled to be compatible with both implementations.
Why did Intel decide to do that?
next prev parent reply other threads:[~2004-02-26 19:08 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-02-26 5:32 Intel vs AMD64 Nakajima, Jun
2004-02-26 13:39 ` Chris Wedgwood
2004-02-26 14:35 ` Richard B. Johnson
2004-02-26 19:25 ` Timothy Miller
2004-02-26 19:46 ` Richard B. Johnson
2004-02-27 18:44 ` H. Peter Anvin
2004-02-26 19:18 ` Timothy Miller [this message]
2004-02-26 19:45 ` Scott Robert Ladd
2004-02-27 14:43 ` Timothy Miller
2004-03-03 17:34 ` Pavel Machek
[not found] <7F740D512C7C1046AB53446D37200173EA28A5@scsmsx402.sc.intel.com.suse.lists.linux.kernel>
[not found] ` <403E4681.20603@techsource.com.suse.lists.linux.kernel>
2004-02-26 20:17 ` Andi Kleen
2004-02-27 14:50 ` Timothy Miller
-- strict thread matches above, loose matches on Subject: below --
2004-02-26 4:28 richard.brunner
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