* fixmap TLB flushing clarification
@ 2004-03-21 0:06 Paul Mundt
0 siblings, 0 replies; 2+ messages in thread
From: Paul Mundt @ 2004-03-21 0:06 UTC (permalink / raw)
To: linux-kernel
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In include/asm-*/fixmap.h the comment about fixed_addresses states:
...
* these 'compile-time allocated' memory buffers are
* fixed-size 4k pages. (or larger if used with an increment
* highger than 1) use fixmap_set(idx,phys) to associate
* physical memory with fixmap indices.
*
* TLB entries of such buffers will not be flushed across
* task switches.
...
I'm curious about the last statement, is this to mean that a TLB entry will
be reserved at set_fixmap() time in which the translation will happen, and
that particular entry will be locked down for the duration of the mapping?
Is some other convention in place to preserve the translation across a
TLB flush at context switch time, or do we actually need to give up a
TLB entry for each fixmap?
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* Re: fixmap TLB flushing clarification
@ 2004-03-21 10:30 Manfred Spraul
0 siblings, 0 replies; 2+ messages in thread
From: Manfred Spraul @ 2004-03-21 10:30 UTC (permalink / raw)
To: Paul Mundt; +Cc: linux-kernel
>
>
>I'm curious about the last statement, is this to mean that a TLB entry will
>be reserved at set_fixmap() time in which the translation will happen, and
>that particular entry will be locked down for the duration of the mapping?
>
>
No. fixmap mappings are global - identical for all processes and all
cpus. Therefore it's not necessary to flush them during a task switch.
But that's just an optimization, not a mandatory feature:
On x86 it's possible to mark page table entries as global. Global
entries are not flushed by the normal tlb flush command, this gives a
slighly better performance. If your architecture doesn't support that,
then you can just flush everything during a task switch. I think the
support for global entries was added for the Pentium cpus - 80486 cpus
flush the whole tlb cache during a task switch.
--
Manfred
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