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([2a00:f41:909a:a11e:a035:2af2:8d85:1f72]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57a7f1a4d7esm1384634a12.68.2024.06.04.04.57.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Jun 2024 04:57:57 -0700 (PDT) Message-ID: <4064c207-bf98-4bb9-b3bb-e291f2e95f8d@linaro.org> Date: Tue, 4 Jun 2024 13:57:50 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer To: Cong Zhang , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com References: <20240604085929.49227-1-quic_congzhan@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20240604085929.49227-1-quic_congzhan@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 6/4/24 10:59, Cong Zhang wrote: > The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ > number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number > of EL2 non-secure physical timer should be 10 (26 - 16). > > Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride") > Signed-off-by: Cong Zhang > --- Seems to match other qcom platforms of the timeframe too.. Reviewed-by: Konrad Dybcio Konrad