From: Lu Baolu <baolu.lu@linux.intel.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: baolu.lu@linux.intel.com, "Raj, Ashok" <ashok.raj@intel.com>,
iommu@lists.linux-foundation.org,
LKML <linux-kernel@vger.kernel.org>,
Joerg Roedel <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
Alex Williamson <alex.williamson@redhat.com>,
Jean-Philippe Brucker <jean-philippe@linaro.com>,
Yi Liu <yi.l.liu@intel.com>, "Tian, Kevin" <kevin.tian@intel.com>,
Christoph Hellwig <hch@infradead.org>,
Jonathan Cameron <jic23@kernel.org>,
Eric Auger <eric.auger@redhat.com>
Subject: Re: [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation
Date: Fri, 25 Oct 2019 09:39:56 +0800 [thread overview]
Message-ID: <40942499-cb3e-cf8d-3e47-288c57da88da@linux.intel.com> (raw)
In-Reply-To: <20191023105523.75895d76@jacob-builder>
Hi,
On 10/24/19 1:55 AM, Jacob Pan wrote:
> On Wed, 23 Oct 2019 09:53:04 +0800
> Lu Baolu <baolu.lu@linux.intel.com> wrote:
>
>> Hi Ashok,
>>
>> Thanks for reviewing the patch.
>>
>> On 10/23/19 8:45 AM, Raj, Ashok wrote:
>>> On Tue, Oct 22, 2019 at 04:53:14PM -0700, Jacob Pan wrote:
>>>> From: Lu Baolu <baolu.lu@linux.intel.com>
>>>>
>>>> If Intel IOMMU runs in caching mode, a.k.a. virtual IOMMU, the
>>>> IOMMU driver should rely on the emulation software to allocate
>>>> and free PASID IDs. The Intel vt-d spec revision 3.0 defines a
>>>> register set to support this. This includes a capability register,
>>>> a virtual command register and a virtual response register. Refer
>>>> to section 10.4.42, 10.4.43, 10.4.44 for more information.
>>>
>>> The above paragraph seems a bit confusing, there is no reference
>>> to caching mode for for VCMD... some suggestion below.
>>>
>>> Enabling IOMMU in a guest requires communication with the host
>>> driver for certain aspects. Use of PASID ID to enable Shared Virtual
>>> Addressing (SVA) requires managing PASID's in the host. VT-d 3.0
>>> spec provides a Virtual Command Register (VCMD) to facilitate this.
>>> Writes to this register in the guest are trapped by Qemu and
>>> proxies the call to the host driver....
>>
>> Yours is better. Will use it.
>>
> I will roll that in to v7
>>>
>>>
>>>>
>>>> This patch adds the enlightened PASID allocation/free interfaces
>>>> via the virtual command register.
>>>>
>>>> Cc: Ashok Raj <ashok.raj@intel.com>
>>>> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
>>>> Cc: Kevin Tian <kevin.tian@intel.com>
>>>> Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
>>>> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
>>>> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
>>>> Reviewed-by: Eric Auger <eric.auger@redhat.com>
>>>> ---
>>>> drivers/iommu/intel-pasid.c | 83
>>>> +++++++++++++++++++++++++++++++++++++++++++++
>>>> drivers/iommu/intel-pasid.h | 13 ++++++-
>>>> include/linux/intel-iommu.h | 2 ++ 3 files changed, 97
>>>> insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/iommu/intel-pasid.c
>>>> b/drivers/iommu/intel-pasid.c index 040a445be300..76bcbb21e112
>>>> 100644 --- a/drivers/iommu/intel-pasid.c
>>>> +++ b/drivers/iommu/intel-pasid.c
>>>> @@ -63,6 +63,89 @@ void *intel_pasid_lookup_id(int pasid)
>>>> return p;
>>>> }
>>>>
>>>> +static int check_vcmd_pasid(struct intel_iommu *iommu)
>>>> +{
>>>> + u64 cap;
>>>> +
>>>> + if (!ecap_vcs(iommu->ecap)) {
>>>> + pr_warn("IOMMU: %s: Hardware doesn't support
>>>> virtual command\n",
>>>> + iommu->name);
>>>> + return -ENODEV;
>>>> + }
>>>> +
>>>> + cap = dmar_readq(iommu->reg + DMAR_VCCAP_REG);
>>>> + if (!(cap & DMA_VCS_PAS)) {
>>>> + pr_warn("IOMMU: %s: Emulation software doesn't
>>>> support PASID allocation\n",
>>>> + iommu->name);
>>>> + return -ENODEV;
>>>> + }
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +int vcmd_alloc_pasid(struct intel_iommu *iommu, unsigned int
>>>> *pasid) +{
>>>> + u64 res;
>>>> + u8 status_code;
>>>> + unsigned long flags;
>>>> + int ret = 0;
>>>> +
>>>> + ret = check_vcmd_pasid(iommu);
>>>
>>> Do you have to check this everytime? every dmar_readq is going to
>>> trap to the other side ...
>>
>> Yes. We don't need to check it every time. Check once and save the
>> result during boot is enough.
>>
>> How about below incremental change?
>>
> Below is good but I was thinking to include vccap in struct
> intel_iommu{} where cap and ecaps reside. i.e.
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
> index 14b87ae2916a..e2cf25c9c956 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -528,6 +528,7 @@ struct intel_iommu {
> u64 reg_size; /* size of hw register set */
> u64 cap;
> u64 ecap;
> + u64 vccap;
>
> Also, we can use a static branch here.
Yeah! Good idea.
Best regards,
baolu
next prev parent reply other threads:[~2019-10-25 1:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-22 23:53 [PATCH v6 00/10] Nested Shared Virtual Address (SVA) VT-d support Jacob Pan
2019-10-22 23:53 ` [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation Jacob Pan
2019-10-23 0:45 ` Raj, Ashok
2019-10-23 1:53 ` Lu Baolu
2019-10-23 17:55 ` Jacob Pan
2019-10-23 21:11 ` Jacob Pan
2019-10-25 1:42 ` Lu Baolu
2019-10-25 1:39 ` Lu Baolu [this message]
2019-10-22 23:53 ` [PATCH v6 02/10] iommu/vt-d: Add custom allocator for IOASID Jacob Pan
2019-10-23 0:51 ` Raj, Ashok
2019-10-23 2:21 ` Lu Baolu
2019-10-23 23:01 ` Jacob Pan
2019-10-25 1:44 ` Lu Baolu
2019-10-23 4:04 ` Jacob Pan
2019-10-23 23:04 ` Jacob Pan
2019-10-22 23:53 ` [PATCH v6 03/10] iommu/vt-d: Replace Intel specific PASID allocator with IOASID Jacob Pan
2019-10-23 0:58 ` Raj, Ashok
2019-10-23 4:19 ` Jacob Pan
2019-10-22 23:53 ` [PATCH v6 04/10] iommu/vt-d: Move domain helper to header Jacob Pan
2019-10-22 23:53 ` [PATCH v6 05/10] iommu/vt-d: Avoid duplicated code for PASID setup Jacob Pan
2019-10-22 23:53 ` [PATCH v6 06/10] iommu/vt-d: Add nested translation helper function Jacob Pan
2019-10-22 23:53 ` [PATCH v6 07/10] iommu/vt-d: Misc macro clean up for SVM Jacob Pan
2019-10-22 23:53 ` [PATCH v6 08/10] iommu/vt-d: Add bind guest PASID support Jacob Pan
2019-10-22 23:53 ` [PATCH v6 09/10] iommu/vt-d: Support flushing more translation cache types Jacob Pan
2019-10-22 23:53 ` [PATCH v6 10/10] iommu/vt-d: Add svm/sva invalidate function Jacob Pan
2019-10-23 0:27 ` [PATCH v6 00/10] Nested Shared Virtual Address (SVA) VT-d support Raj, Ashok
2019-10-23 13:46 ` Jacob Pan
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