RE: CONFIG_IRQBALANCE for AMD64?

Nakajima, Jun
2004-05-28T22:47:49Z

>From: Andi Kleen [mailto:ak@muc.de]
>Sent: Friday, May 28, 2004 2:45 PM
>To: Martin J. Bligh
>Cc: linux-kernel@vger.kernel.org; Nakajima, Jun
>Subject: Re: CONFIG_IRQBALANCE for AMD64?
>
>"Martin J. Bligh" <mbligh@aracnet.com> writes:
>
>> Whatever we do ... all arches are going to need to provide a way to
>direct
>> interrupts to a certain CPU, or group thereof. Can they all do that
>already?
>> I'll confess to not having looked at non-i386 arches. And are others
as
>> brain damaged as the P4? or do they do something round-robin by
default?
>
>I wouldn't really blame the the P4, it's the IO-APICs in the chipsets
>that balance or not balance.
>
>At least the AMD chipsets found in most Opteron boxes need software
>balancing too.

Actually lowest priority delivery works on P4 and AMD (I did not tested
it on AMD, though), if we _update_ TPR. But I don't recommend that,
instead we should implement the similar or optimized behavior in
software because "soft TPR" can be more efficient and scalable. And I
think this is something in my mind, and I think the kernel should do it.

Jun

>
>-Andi
>