* [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests
@ 2025-08-08 10:18 zhouquan
2025-08-08 10:18 ` [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa zhouquan
` (6 more replies)
0 siblings, 7 replies; 17+ messages in thread
From: zhouquan @ 2025-08-08 10:18 UTC (permalink / raw)
To: anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Quan Zhou
From: Quan Zhou <zhouquan@iscas.ac.cn>
Advertise zicbop/bfloat16 extensions to KVM guest when underlying
host supports it, and add them to get-reg-list test.
---
Change since v1:
- update zicbom/zicboz/zicbop block size registers to depend on the host isa.
- update the reg list filtering in copy_config_reg_indices() to use the host isa.
- add reg list filtering for zicbop.
v1: https://lore.kernel.org/all/cover.1750164414.git.zhouquan@iscas.ac.cn/
Quan Zhou (6):
RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa
RISC-V: KVM: Provide UAPI for Zicbop block size
RISC-V: KVM: Allow Zicbop extension for Guest/VM
RISC-V: KVM: Allow bfloat16 extension for Guest/VM
KVM: riscv: selftests: Add Zicbop extension to get-reg-list test
KVM: riscv: selftests: Add bfloat16 extension to get-reg-list test
arch/riscv/include/uapi/asm/kvm.h | 5 +++
arch/riscv/kvm/vcpu_onereg.c | 34 +++++++++++++++----
.../selftests/kvm/riscv/get-reg-list.c | 25 ++++++++++++++
3 files changed, 58 insertions(+), 6 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa
2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
@ 2025-08-08 10:18 ` zhouquan
2025-08-18 20:32 ` Andrew Jones
` (2 more replies)
2025-08-08 10:18 ` [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
` (5 subsequent siblings)
6 siblings, 3 replies; 17+ messages in thread
From: zhouquan @ 2025-08-08 10:18 UTC (permalink / raw)
To: anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Quan Zhou
From: Quan Zhou <zhouquan@iscas.ac.cn>
The zicbom/zicboz block size registers should depend on the host's isa,
the reason is that we otherwise create an ioctl order dependency on the VMM.
Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
---
arch/riscv/kvm/vcpu_onereg.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index cce6a38ea54f..6bd64ae17b80 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -277,12 +277,12 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu,
reg_val = vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK;
break;
case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size):
- if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))
+ if (!riscv_isa_extension_available(NULL, ZICBOM))
return -ENOENT;
reg_val = riscv_cbom_block_size;
break;
case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size):
- if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))
+ if (!riscv_isa_extension_available(NULL, ZICBOZ))
return -ENOENT;
reg_val = riscv_cboz_block_size;
break;
@@ -366,13 +366,13 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
}
break;
case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size):
- if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))
+ if (!riscv_isa_extension_available(NULL, ZICBOM))
return -ENOENT;
if (reg_val != riscv_cbom_block_size)
return -EINVAL;
break;
case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size):
- if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))
+ if (!riscv_isa_extension_available(NULL, ZICBOZ))
return -ENOENT;
if (reg_val != riscv_cboz_block_size)
return -EINVAL;
@@ -817,10 +817,10 @@ static int copy_config_reg_indices(const struct kvm_vcpu *vcpu,
* was not available.
*/
if (i == KVM_REG_RISCV_CONFIG_REG(zicbom_block_size) &&
- !riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))
+ !riscv_isa_extension_available(NULL, ZICBOM))
continue;
else if (i == KVM_REG_RISCV_CONFIG_REG(zicboz_block_size) &&
- !riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))
+ !riscv_isa_extension_available(NULL, ZICBOZ))
continue;
size = IS_ENABLED(CONFIG_32BIT) ? KVM_REG_SIZE_U32 : KVM_REG_SIZE_U64;
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size
2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
2025-08-08 10:18 ` [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa zhouquan
@ 2025-08-08 10:18 ` zhouquan
2025-08-18 20:33 ` Andrew Jones
2025-08-19 3:39 ` Nutty.Liu
2025-08-08 10:18 ` [PATCH v2 3/6] RISC-V: KVM: Allow Zicbop extension for Guest/VM zhouquan
` (4 subsequent siblings)
6 siblings, 2 replies; 17+ messages in thread
From: zhouquan @ 2025-08-08 10:18 UTC (permalink / raw)
To: anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Quan Zhou
From: Quan Zhou <zhouquan@iscas.ac.cn>
We're about to allow guests to use the Zicbop extension.
KVM userspace needs to know the cache block size in order to
properly advertise it to the guest. Provide a virtual config
register for userspace to get it with the GET_ONE_REG API, but
setting it cannot be supported, so disallow SET_ONE_REG.
Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 14 ++++++++++++++
2 files changed, 15 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index ef27d4289da1..bb200f82d08e 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -56,6 +56,7 @@ struct kvm_riscv_config {
unsigned long mimpid;
unsigned long zicboz_block_size;
unsigned long satp_mode;
+ unsigned long zicbop_block_size;
};
/* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 6bd64ae17b80..cf5003eb2e41 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -286,6 +286,11 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu,
return -ENOENT;
reg_val = riscv_cboz_block_size;
break;
+ case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size):
+ if (!riscv_isa_extension_available(NULL, ZICBOP))
+ return -ENOENT;
+ reg_val = riscv_cbop_block_size;
+ break;
case KVM_REG_RISCV_CONFIG_REG(mvendorid):
reg_val = vcpu->arch.mvendorid;
break;
@@ -377,6 +382,12 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
if (reg_val != riscv_cboz_block_size)
return -EINVAL;
break;
+ case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size):
+ if (!riscv_isa_extension_available(NULL, ZICBOP))
+ return -ENOENT;
+ if (reg_val != riscv_cbop_block_size)
+ return -EINVAL;
+ break;
case KVM_REG_RISCV_CONFIG_REG(mvendorid):
if (reg_val == vcpu->arch.mvendorid)
break;
@@ -822,6 +833,9 @@ static int copy_config_reg_indices(const struct kvm_vcpu *vcpu,
else if (i == KVM_REG_RISCV_CONFIG_REG(zicboz_block_size) &&
!riscv_isa_extension_available(NULL, ZICBOZ))
continue;
+ else if (i == KVM_REG_RISCV_CONFIG_REG(zicbop_block_size) &&
+ !riscv_isa_extension_available(NULL, ZICBOP))
+ continue;
size = IS_ENABLED(CONFIG_32BIT) ? KVM_REG_SIZE_U32 : KVM_REG_SIZE_U64;
reg = KVM_REG_RISCV | size | KVM_REG_RISCV_CONFIG | i;
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 3/6] RISC-V: KVM: Allow Zicbop extension for Guest/VM
2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
2025-08-08 10:18 ` [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa zhouquan
2025-08-08 10:18 ` [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
@ 2025-08-08 10:18 ` zhouquan
2025-08-19 3:39 ` Nutty.Liu
2025-08-08 10:18 ` [PATCH v2 4/6] RISC-V: KVM: Allow bfloat16 " zhouquan
` (3 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: zhouquan @ 2025-08-08 10:18 UTC (permalink / raw)
To: anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Quan Zhou
From: Quan Zhou <zhouquan@iscas.ac.cn>
Extend the KVM ISA extension ONE_REG interface to allow KVM user space
to detect and enable Zicbop extension for Guest/VM.
Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index bb200f82d08e..ddaa5c1ecb84 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -186,6 +186,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZICCRSE,
KVM_RISCV_ISA_EXT_ZAAMO,
KVM_RISCV_ISA_EXT_ZALRSC,
+ KVM_RISCV_ISA_EXT_ZICBOP,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index cf5003eb2e41..73ce35c776df 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -68,6 +68,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(ZFH),
KVM_ISA_EXT_ARR(ZFHMIN),
KVM_ISA_EXT_ARR(ZICBOM),
+ KVM_ISA_EXT_ARR(ZICBOP),
KVM_ISA_EXT_ARR(ZICBOZ),
KVM_ISA_EXT_ARR(ZICCRSE),
KVM_ISA_EXT_ARR(ZICNTR),
@@ -201,6 +202,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_ZFA:
case KVM_RISCV_ISA_EXT_ZFH:
case KVM_RISCV_ISA_EXT_ZFHMIN:
+ case KVM_RISCV_ISA_EXT_ZICBOP:
case KVM_RISCV_ISA_EXT_ZICCRSE:
case KVM_RISCV_ISA_EXT_ZICNTR:
case KVM_RISCV_ISA_EXT_ZICOND:
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 4/6] RISC-V: KVM: Allow bfloat16 extension for Guest/VM
2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
` (2 preceding siblings ...)
2025-08-08 10:18 ` [PATCH v2 3/6] RISC-V: KVM: Allow Zicbop extension for Guest/VM zhouquan
@ 2025-08-08 10:18 ` zhouquan
2025-08-19 3:41 ` Nutty.Liu
2025-08-08 10:19 ` [PATCH v2 5/6] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test zhouquan
` (2 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: zhouquan @ 2025-08-08 10:18 UTC (permalink / raw)
To: anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Quan Zhou
From: Quan Zhou <zhouquan@iscas.ac.cn>
Extend the KVM ISA extension ONE_REG interface to allow KVM user space
to detect and enable Zfbfmin/Zvfbfmin/Zvfbfwma extension for Guest/VM.
Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 3 +++
arch/riscv/kvm/vcpu_onereg.c | 6 ++++++
2 files changed, 9 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index ddaa5c1ecb84..ee8b7b93a892 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -187,6 +187,9 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZAAMO,
KVM_RISCV_ISA_EXT_ZALRSC,
KVM_RISCV_ISA_EXT_ZICBOP,
+ KVM_RISCV_ISA_EXT_ZFBFMIN,
+ KVM_RISCV_ISA_EXT_ZVFBFMIN,
+ KVM_RISCV_ISA_EXT_ZVFBFWMA,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 73ce35c776df..74ee2d6893bf 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -65,6 +65,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(ZCF),
KVM_ISA_EXT_ARR(ZCMOP),
KVM_ISA_EXT_ARR(ZFA),
+ KVM_ISA_EXT_ARR(ZFBFMIN),
KVM_ISA_EXT_ARR(ZFH),
KVM_ISA_EXT_ARR(ZFHMIN),
KVM_ISA_EXT_ARR(ZICBOM),
@@ -89,6 +90,8 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
+ KVM_ISA_EXT_ARR(ZVFBFMIN),
+ KVM_ISA_EXT_ARR(ZVFBFWMA),
KVM_ISA_EXT_ARR(ZVFH),
KVM_ISA_EXT_ARR(ZVFHMIN),
KVM_ISA_EXT_ARR(ZVKB),
@@ -200,6 +203,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_ZCF:
case KVM_RISCV_ISA_EXT_ZCMOP:
case KVM_RISCV_ISA_EXT_ZFA:
+ case KVM_RISCV_ISA_EXT_ZFBFMIN:
case KVM_RISCV_ISA_EXT_ZFH:
case KVM_RISCV_ISA_EXT_ZFHMIN:
case KVM_RISCV_ISA_EXT_ZICBOP:
@@ -222,6 +226,8 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_ZTSO:
case KVM_RISCV_ISA_EXT_ZVBB:
case KVM_RISCV_ISA_EXT_ZVBC:
+ case KVM_RISCV_ISA_EXT_ZVFBFMIN:
+ case KVM_RISCV_ISA_EXT_ZVFBFWMA:
case KVM_RISCV_ISA_EXT_ZVFH:
case KVM_RISCV_ISA_EXT_ZVFHMIN:
case KVM_RISCV_ISA_EXT_ZVKB:
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 5/6] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test
2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
` (3 preceding siblings ...)
2025-08-08 10:18 ` [PATCH v2 4/6] RISC-V: KVM: Allow bfloat16 " zhouquan
@ 2025-08-08 10:19 ` zhouquan
2025-08-19 3:41 ` Nutty.Liu
2025-08-08 10:19 ` [PATCH v2 6/6] KVM: riscv: selftests: Add bfloat16 " zhouquan
2025-08-22 11:20 ` [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests Anup Patel
6 siblings, 1 reply; 17+ messages in thread
From: zhouquan @ 2025-08-08 10:19 UTC (permalink / raw)
To: anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Quan Zhou
From: Quan Zhou <zhouquan@iscas.ac.cn>
The KVM RISC-V allows Zicbop extension for Guest/VM
so add them to get-reg-list test.
Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index a0b7dabb5040..e60e1975095b 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -83,6 +83,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOP:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOZ:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICCRSE:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICNTR:
@@ -255,6 +256,8 @@ static const char *config_id_to_str(const char *prefix, __u64 id)
return "KVM_REG_RISCV_CONFIG_REG(zicbom_block_size)";
case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size):
return "KVM_REG_RISCV_CONFIG_REG(zicboz_block_size)";
+ case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size):
+ return "KVM_REG_RISCV_CONFIG_REG(zicbop_block_size)";
case KVM_REG_RISCV_CONFIG_REG(mvendorid):
return "KVM_REG_RISCV_CONFIG_REG(mvendorid)";
case KVM_REG_RISCV_CONFIG_REG(marchid):
@@ -535,6 +538,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(ZFH),
KVM_ISA_EXT_ARR(ZFHMIN),
KVM_ISA_EXT_ARR(ZICBOM),
+ KVM_ISA_EXT_ARR(ZICBOP),
KVM_ISA_EXT_ARR(ZICBOZ),
KVM_ISA_EXT_ARR(ZICCRSE),
KVM_ISA_EXT_ARR(ZICNTR),
@@ -864,6 +868,11 @@ static __u64 zicbom_regs[] = {
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM,
};
+static __u64 zicbop_regs[] = {
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicbop_block_size),
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOP,
+};
+
static __u64 zicboz_regs[] = {
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicboz_block_size),
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOZ,
@@ -1012,6 +1021,8 @@ static __u64 vector_regs[] = {
.regs = sbi_sta_regs, .regs_n = ARRAY_SIZE(sbi_sta_regs),}
#define SUBLIST_ZICBOM \
{"zicbom", .feature = KVM_RISCV_ISA_EXT_ZICBOM, .regs = zicbom_regs, .regs_n = ARRAY_SIZE(zicbom_regs),}
+#define SUBLIST_ZICBOP \
+ {"zicbop", .feature = KVM_RISCV_ISA_EXT_ZICBOP, .regs = zicbop_regs, .regs_n = ARRAY_SIZE(zicbop_regs),}
#define SUBLIST_ZICBOZ \
{"zicboz", .feature = KVM_RISCV_ISA_EXT_ZICBOZ, .regs = zicboz_regs, .regs_n = ARRAY_SIZE(zicboz_regs),}
#define SUBLIST_AIA \
@@ -1130,6 +1141,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA);
KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH);
KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN);
KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM);
+KVM_ISA_EXT_SUBLIST_CONFIG(zicbop, ZICBOP);
KVM_ISA_EXT_SUBLIST_CONFIG(zicboz, ZICBOZ);
KVM_ISA_EXT_SIMPLE_CONFIG(ziccrse, ZICCRSE);
KVM_ISA_EXT_SIMPLE_CONFIG(zicntr, ZICNTR);
@@ -1204,6 +1216,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_zfh,
&config_zfhmin,
&config_zicbom,
+ &config_zicbop,
&config_zicboz,
&config_ziccrse,
&config_zicntr,
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 6/6] KVM: riscv: selftests: Add bfloat16 extension to get-reg-list test
2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
` (4 preceding siblings ...)
2025-08-08 10:19 ` [PATCH v2 5/6] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test zhouquan
@ 2025-08-08 10:19 ` zhouquan
2025-08-19 3:42 ` Nutty.Liu
2025-08-22 11:20 ` [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests Anup Patel
6 siblings, 1 reply; 17+ messages in thread
From: zhouquan @ 2025-08-08 10:19 UTC (permalink / raw)
To: anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Quan Zhou
From: Quan Zhou <zhouquan@iscas.ac.cn>
The KVM RISC-V allows Zfbfmin/Zvfbfmin/Zvfbfwma extensions for Guest/VM
so add them to get-reg-list test.
Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index e60e1975095b..5e461c83a4aa 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -80,6 +80,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCF:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCMOP:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFA:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFBFMIN:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM:
@@ -104,6 +105,8 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFBFMIN:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFBFWMA:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFHMIN:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVKB:
@@ -535,6 +538,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(ZCF),
KVM_ISA_EXT_ARR(ZCMOP),
KVM_ISA_EXT_ARR(ZFA),
+ KVM_ISA_EXT_ARR(ZFBFMIN),
KVM_ISA_EXT_ARR(ZFH),
KVM_ISA_EXT_ARR(ZFHMIN),
KVM_ISA_EXT_ARR(ZICBOM),
@@ -559,6 +563,8 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
+ KVM_ISA_EXT_ARR(ZVFBFMIN),
+ KVM_ISA_EXT_ARR(ZVFBFWMA),
KVM_ISA_EXT_ARR(ZVFH),
KVM_ISA_EXT_ARR(ZVFHMIN),
KVM_ISA_EXT_ARR(ZVKB),
@@ -1138,6 +1144,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zcd, ZCD);
KVM_ISA_EXT_SIMPLE_CONFIG(zcf, ZCF);
KVM_ISA_EXT_SIMPLE_CONFIG(zcmop, ZCMOP);
KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA);
+KVM_ISA_EXT_SIMPLE_CONFIG(zfbfmin, ZFBFMIN);
KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH);
KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN);
KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM);
@@ -1162,6 +1169,8 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
+KVM_ISA_EXT_SIMPLE_CONFIG(zvfbfmin, ZVFBFMIN);
+KVM_ISA_EXT_SIMPLE_CONFIG(zvfbfwma, ZVFBFWMA);
KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
KVM_ISA_EXT_SIMPLE_CONFIG(zvfhmin, ZVFHMIN);
KVM_ISA_EXT_SIMPLE_CONFIG(zvkb, ZVKB);
@@ -1213,6 +1222,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_zcf,
&config_zcmop,
&config_zfa,
+ &config_zfbfmin,
&config_zfh,
&config_zfhmin,
&config_zicbom,
@@ -1237,6 +1247,8 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_ztso,
&config_zvbb,
&config_zvbc,
+ &config_zvfbfmin,
+ &config_zvfbfwma,
&config_zvfh,
&config_zvfhmin,
&config_zvkb,
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa
2025-08-08 10:18 ` [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa zhouquan
@ 2025-08-18 20:32 ` Andrew Jones
2025-08-19 1:17 ` Troy Mitchell
2025-08-19 3:38 ` Nutty.Liu
2 siblings, 0 replies; 17+ messages in thread
From: Andrew Jones @ 2025-08-18 20:32 UTC (permalink / raw)
To: zhouquan
Cc: anup, atishp, paul.walmsley, palmer, linux-kernel, linux-riscv,
kvm, kvm-riscv
On Fri, Aug 08, 2025 at 06:18:21PM +0800, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> The zicbom/zicboz block size registers should depend on the host's isa,
> the reason is that we otherwise create an ioctl order dependency on the VMM.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
> arch/riscv/kvm/vcpu_onereg.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size
2025-08-08 10:18 ` [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
@ 2025-08-18 20:33 ` Andrew Jones
2025-08-19 3:39 ` Nutty.Liu
1 sibling, 0 replies; 17+ messages in thread
From: Andrew Jones @ 2025-08-18 20:33 UTC (permalink / raw)
To: zhouquan
Cc: anup, atishp, paul.walmsley, palmer, linux-kernel, linux-riscv,
kvm, kvm-riscv
On Fri, Aug 08, 2025 at 06:18:34PM +0800, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> We're about to allow guests to use the Zicbop extension.
> KVM userspace needs to know the cache block size in order to
> properly advertise it to the guest. Provide a virtual config
> register for userspace to get it with the GET_ONE_REG API, but
> setting it cannot be supported, so disallow SET_ONE_REG.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 14 ++++++++++++++
> 2 files changed, 15 insertions(+)
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa
2025-08-08 10:18 ` [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa zhouquan
2025-08-18 20:32 ` Andrew Jones
@ 2025-08-19 1:17 ` Troy Mitchell
2025-08-19 3:38 ` Nutty.Liu
2 siblings, 0 replies; 17+ messages in thread
From: Troy Mitchell @ 2025-08-19 1:17 UTC (permalink / raw)
To: zhouquan, anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv, Troy Mitchell
On Fri, Aug 08, 2025 at 06:18:21PM +0800, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> The zicbom/zicboz block size registers should depend on the host's isa,
> the reason is that we otherwise create an ioctl order dependency on the VMM.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
> arch/riscv/kvm/vcpu_onereg.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
Reviwed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Best regards,
Troy
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index cce6a38ea54f..6bd64ae17b80 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -277,12 +277,12 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu,
> reg_val = vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK;
> break;
> case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size):
> - if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))
> + if (!riscv_isa_extension_available(NULL, ZICBOM))
> return -ENOENT;
> reg_val = riscv_cbom_block_size;
> break;
> case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size):
> - if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))
> + if (!riscv_isa_extension_available(NULL, ZICBOZ))
> return -ENOENT;
> reg_val = riscv_cboz_block_size;
> break;
> @@ -366,13 +366,13 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
> }
> break;
> case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size):
> - if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))
> + if (!riscv_isa_extension_available(NULL, ZICBOM))
> return -ENOENT;
> if (reg_val != riscv_cbom_block_size)
> return -EINVAL;
> break;
> case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size):
> - if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))
> + if (!riscv_isa_extension_available(NULL, ZICBOZ))
> return -ENOENT;
> if (reg_val != riscv_cboz_block_size)
> return -EINVAL;
> @@ -817,10 +817,10 @@ static int copy_config_reg_indices(const struct kvm_vcpu *vcpu,
> * was not available.
> */
> if (i == KVM_REG_RISCV_CONFIG_REG(zicbom_block_size) &&
> - !riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))
> + !riscv_isa_extension_available(NULL, ZICBOM))
> continue;
> else if (i == KVM_REG_RISCV_CONFIG_REG(zicboz_block_size) &&
> - !riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))
> + !riscv_isa_extension_available(NULL, ZICBOZ))
> continue;
>
> size = IS_ENABLED(CONFIG_32BIT) ? KVM_REG_SIZE_U32 : KVM_REG_SIZE_U64;
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa
2025-08-08 10:18 ` [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa zhouquan
2025-08-18 20:32 ` Andrew Jones
2025-08-19 1:17 ` Troy Mitchell
@ 2025-08-19 3:38 ` Nutty.Liu
2 siblings, 0 replies; 17+ messages in thread
From: Nutty.Liu @ 2025-08-19 3:38 UTC (permalink / raw)
To: zhouquan, anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv
On 8/8/2025 6:18 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> The zicbom/zicboz block size registers should depend on the host's isa,
> the reason is that we otherwise create an ioctl order dependency on the VMM.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
> arch/riscv/kvm/vcpu_onereg.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Thanks,
Nutty
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size
2025-08-08 10:18 ` [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
2025-08-18 20:33 ` Andrew Jones
@ 2025-08-19 3:39 ` Nutty.Liu
1 sibling, 0 replies; 17+ messages in thread
From: Nutty.Liu @ 2025-08-19 3:39 UTC (permalink / raw)
To: zhouquan, anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv
On 8/8/2025 6:18 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> We're about to allow guests to use the Zicbop extension.
> KVM userspace needs to know the cache block size in order to
> properly advertise it to the guest. Provide a virtual config
> register for userspace to get it with the GET_ONE_REG API, but
> setting it cannot be supported, so disallow SET_ONE_REG.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 14 ++++++++++++++
> 2 files changed, 15 insertions(+)
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Thanks,
Nutty
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 3/6] RISC-V: KVM: Allow Zicbop extension for Guest/VM
2025-08-08 10:18 ` [PATCH v2 3/6] RISC-V: KVM: Allow Zicbop extension for Guest/VM zhouquan
@ 2025-08-19 3:39 ` Nutty.Liu
0 siblings, 0 replies; 17+ messages in thread
From: Nutty.Liu @ 2025-08-19 3:39 UTC (permalink / raw)
To: zhouquan, anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv
On 8/8/2025 6:18 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> Extend the KVM ISA extension ONE_REG interface to allow KVM user space
> to detect and enable Zicbop extension for Guest/VM.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Thanks,
Nutty
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 4/6] RISC-V: KVM: Allow bfloat16 extension for Guest/VM
2025-08-08 10:18 ` [PATCH v2 4/6] RISC-V: KVM: Allow bfloat16 " zhouquan
@ 2025-08-19 3:41 ` Nutty.Liu
0 siblings, 0 replies; 17+ messages in thread
From: Nutty.Liu @ 2025-08-19 3:41 UTC (permalink / raw)
To: zhouquan, anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv
On 8/8/2025 6:18 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> Extend the KVM ISA extension ONE_REG interface to allow KVM user space
> to detect and enable Zfbfmin/Zvfbfmin/Zvfbfwma extension for Guest/VM.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 3 +++
> arch/riscv/kvm/vcpu_onereg.c | 6 ++++++
> 2 files changed, 9 insertions(+)
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Thanks,
Nutty
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 5/6] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test
2025-08-08 10:19 ` [PATCH v2 5/6] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test zhouquan
@ 2025-08-19 3:41 ` Nutty.Liu
0 siblings, 0 replies; 17+ messages in thread
From: Nutty.Liu @ 2025-08-19 3:41 UTC (permalink / raw)
To: zhouquan, anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv
On 8/8/2025 6:19 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> The KVM RISC-V allows Zicbop extension for Guest/VM
> so add them to get-reg-list test.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Thanks,
Nutty
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 6/6] KVM: riscv: selftests: Add bfloat16 extension to get-reg-list test
2025-08-08 10:19 ` [PATCH v2 6/6] KVM: riscv: selftests: Add bfloat16 " zhouquan
@ 2025-08-19 3:42 ` Nutty.Liu
0 siblings, 0 replies; 17+ messages in thread
From: Nutty.Liu @ 2025-08-19 3:42 UTC (permalink / raw)
To: zhouquan, anup, ajones, atishp, paul.walmsley, palmer
Cc: linux-kernel, linux-riscv, kvm, kvm-riscv
On 8/8/2025 6:19 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> The KVM RISC-V allows Zfbfmin/Zvfbfmin/Zvfbfwma extensions for Guest/VM
> so add them to get-reg-list test.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Thanks,
Nutty
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests
2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
` (5 preceding siblings ...)
2025-08-08 10:19 ` [PATCH v2 6/6] KVM: riscv: selftests: Add bfloat16 " zhouquan
@ 2025-08-22 11:20 ` Anup Patel
6 siblings, 0 replies; 17+ messages in thread
From: Anup Patel @ 2025-08-22 11:20 UTC (permalink / raw)
To: zhouquan
Cc: ajones, atishp, paul.walmsley, palmer, linux-kernel, linux-riscv,
kvm, kvm-riscv
On Fri, Aug 8, 2025 at 4:00 PM <zhouquan@iscas.ac.cn> wrote:
>
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> Advertise zicbop/bfloat16 extensions to KVM guest when underlying
> host supports it, and add them to get-reg-list test.
>
> ---
> Change since v1:
> - update zicbom/zicboz/zicbop block size registers to depend on the host isa.
> - update the reg list filtering in copy_config_reg_indices() to use the host isa.
> - add reg list filtering for zicbop.
> v1: https://lore.kernel.org/all/cover.1750164414.git.zhouquan@iscas.ac.cn/
>
> Quan Zhou (6):
> RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa
> RISC-V: KVM: Provide UAPI for Zicbop block size
> RISC-V: KVM: Allow Zicbop extension for Guest/VM
> RISC-V: KVM: Allow bfloat16 extension for Guest/VM
> KVM: riscv: selftests: Add Zicbop extension to get-reg-list test
> KVM: riscv: selftests: Add bfloat16 extension to get-reg-list test
Queued this series for Linux-6.18
Thanks,
Anup
>
> arch/riscv/include/uapi/asm/kvm.h | 5 +++
> arch/riscv/kvm/vcpu_onereg.c | 34 +++++++++++++++----
> .../selftests/kvm/riscv/get-reg-list.c | 25 ++++++++++++++
> 3 files changed, 58 insertions(+), 6 deletions(-)
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
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Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
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2025-08-08 10:18 [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests zhouquan
2025-08-08 10:18 ` [PATCH v2 1/6] RISC-V: KVM: Change zicbom/zicboz block size to depend on the host isa zhouquan
2025-08-18 20:32 ` Andrew Jones
2025-08-19 1:17 ` Troy Mitchell
2025-08-19 3:38 ` Nutty.Liu
2025-08-08 10:18 ` [PATCH v2 2/6] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
2025-08-18 20:33 ` Andrew Jones
2025-08-19 3:39 ` Nutty.Liu
2025-08-08 10:18 ` [PATCH v2 3/6] RISC-V: KVM: Allow Zicbop extension for Guest/VM zhouquan
2025-08-19 3:39 ` Nutty.Liu
2025-08-08 10:18 ` [PATCH v2 4/6] RISC-V: KVM: Allow bfloat16 " zhouquan
2025-08-19 3:41 ` Nutty.Liu
2025-08-08 10:19 ` [PATCH v2 5/6] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test zhouquan
2025-08-19 3:41 ` Nutty.Liu
2025-08-08 10:19 ` [PATCH v2 6/6] KVM: riscv: selftests: Add bfloat16 " zhouquan
2025-08-19 3:42 ` Nutty.Liu
2025-08-22 11:20 ` [PATCH v2 0/6] RISC-V: KVM: Allow zicbop/bfloat16 exts for guests Anup Patel
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