From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 535D136827E for ; Thu, 21 May 2026 09:10:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779354652; cv=none; b=YJfEmSE3eYaRUo8jSfGWlSHYa1v+YLV40mVuFZqZ+MGO57cgWnfAloeR3yt+FsL6BIX2V99/QoJJtd9BbC9p+gNJgwNJ8PhmhybVBhnSaroZyLuFWhhiEVgpgQFwURWOGTR0nxOWyA5B/aIeu4kNlQAmA0ajwP1y39RgF4/xZaE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779354652; c=relaxed/simple; bh=7JIMO0u+Y3uAKVVk9RnN3Qvor4lrya+W75+MLKc0XVM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XTTJcDlBzfUGtQh3ulvu1B905PoJslwBni3hycP18FPmqgcskNPXdbJ0/TOW+wb/h0ShsAJHyaLyn2S0zWSXr6+VLd0c3uigRp19Fs5au+8MzrcD+aJJn3+ayKzemZsJGq8PiSVbxrCNqypQaIQh0i4riJzlAVHmX3qmiErYgLA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=n4AGgQv/; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="n4AGgQv/" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=WPIPD1BGr2Dw7vziqVwt5eCDNK/gCvwcla72fV+D2yg=; b=n4AGgQv/3ZavNsA63rM333XACz fHeXMoXEM4eBFG1LP0Ys0BRitcArnY8IAgN2epsQB4cNX3/yCN97sX9MlCGTZOGqFcNSdibj3YZ5h 6WViB5qjiers9mTvUqHimV+B86SbXZ9kOakAAg7ENnauDqFcmiGGW5Toh+XVJWJAwD+KkNkpP8nlQ E5CAWpVRuTPHJQp61w1J6AdHuXauVYWK4xtlPnnOjyFSzBcX0AubmQ/BWMJdiWO7+JF5GfWOKKS3l QZwplLMC9HPhmAE68RKTYe48TwJfceAqc+JkS708NXveJ1jSQOt5P+R/TF1h1xFATp5iG2iNpwHEE U4vNICHA==; From: Heiko Stuebner To: Vinod Koul , Neil Armstrong , Jonas Karlman Cc: linux-phy@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: Re: [PATCH v4 1/2] phy: rockchip: inno-hdmi: Add configure() and validate() ops Date: Thu, 21 May 2026 11:10:45 +0200 Message-ID: <4136874.Dhsi8hcfAM@phil> In-Reply-To: <20260518180722.2480799-2-jonas@kwiboo.se> References: <20260518180722.2480799-1-jonas@kwiboo.se> <20260518180722.2480799-2-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Am Montag, 18. Mai 2026, 20:07:20 Mitteleurop=C3=A4ische Sommerzeit schrieb= Jonas Karlman: > The commit 10ed34d6eaaf ("phy: Add HDMI configuration options") > introduced a way for HDMI PHYs to be configured through the generic > phy_configure() function. >=20 > This driver derives the TMDS character rate from the pixel clock and the > PHY bus width setting. However, no in-tree consumer of this PHY has ever > called phy_set_bus_width() to change the TMDS character rate as only > 8-bit RGB output is supported by the HDMI display driver. >=20 > Add configure() and validate() ops to allow consumers to configure the > TMDS character rate using phy_configure(). Fallback to the deprecated > way of using the PHY bus width to configure the TMDS character rate. >=20 > A typical call chain during DRM modeset on a RK3328 device: >=20 > dw_hdmi_rockchip_encoder_atomic_check(): > - inno_hdmi_phy_validate(): pixclock 148500000 tmdsclock 594000000 >=20 > dw_hdmi_rockchip_encoder_atomic_mode_set(): > - inno_hdmi_phy_configure(): pixclock 148500000 > - inno_hdmi_phy_validate(): pixclock 148500000 tmdsclock 594000000 >=20 > vop_crtc_atomic_enable(): > - inno_hdmi_phy_rk3328_clk_set_rate(): rate 594000000 tmdsclk 594000000 > inno_hdmi_phy_rk3328_clk_set_rate(): pixclock 594000000 tmdsclock 594= 000000 > - inno_hdmi_phy_rk3328_clk_recalc_rate(): pixclock 594000000 vco 594000= 000 >=20 > dw_hdmi_rockchip_encoder_enable(): > - inno_hdmi_phy_power_on(): Inno HDMI PHY Power On > - inno_hdmi_phy_rk3328_clk_set_rate(): rate 594000000 tmdsclk 5940000= 00 >=20 > Signed-off-by: Jonas Karlman Reviewed-by: Heiko Stuebner Tested-by: Heiko Stuebner #rk3328