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From: Robert Picco <Robert.Picco@hp.com>
To: Christoph Lameter <clameter@sgi.com>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>,
	linux-kernel@vger.kernel.org, Jesse Barnes <jbarnes@engr.sgi.com>,
	venkatesh.pallipadi@intel.com
Subject: Re: device driver for the SGI system clock, mmtimer
Date: Thu, 16 Sep 2004 21:34:47 -0400	[thread overview]
Message-ID: <414A3F37.9080804@hp.com> (raw)
In-Reply-To: <Pine.LNX.4.58.0409161259030.7834@schroedinger.engr.sgi.com>

Christoph Lameter wrote:

>On Thu, 16 Sep 2004, Robert Picco wrote:
>
>  
>
>>>Is there something specific that drivers/char/hpet.c expects that
>>>your hardware doesn't implement?
>>>      
>>>
>>Look at HPET revision history.  Specifically 0.98 01/20/2002
>>    * Product name changed: from Multimedia Timer to HPET (High
>>Precision Event Timer)
>>    
>>
>
>The HPET timer has a specific memory layout of registers that is mappable
>to user space. The mmtimer driver only allows the mapping of a single 64
>bit counter to use space. We have lots of applications at SGI
>that rely on mmtimer since mmtimer provides a locally accessible
>clock in an NUMA environment with hundreds of CPU. A hpet device would
>have to show up in the global address space and require cross node
>accesses in our NUMA environment that would make access to the timer
>slow. All CPU would content for access to a certain global memory address.
>
>The HPET hardware and the sgi mmtimer are totally different architectures
>that are not easily reconcilable.
>
>The software API to handle both is similar and we would like it to be as
>compatible as possible.
>
>-
>To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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>
>  
>
Ah.  Well this might be possible.  The HP HPET hardware is on each NUMA 
node. So cross node issues could be addressed. The bit counter isn't an 
open point for the HPET driver.  Only the HPET timers which march 
against the bit counter can be opened.  The current open logic in the 
driver hunts to find an available timer.  To coexist with mmtimer and 
just enabling the mmaping of the bit counter would require changing the 
driver API.  The other API issues are resolvable with little effort.  I 
think ;-)

Bob

  reply	other threads:[~2004-09-17  1:26 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-09-16 16:03 device driver for the SGI system clock, mmtimer Bjorn Helgaas
2004-09-16 16:09 ` Jesse Barnes
2004-09-16 15:52   ` Alan Cox
2004-09-16 17:07     ` Jesse Barnes
2004-09-16 18:17       ` Robert Picco
2004-09-16 18:23         ` Jesse Barnes
2004-09-16 18:00     ` Robert Picco
2004-09-16 16:29   ` Marcello Barnaba
2004-09-16 16:30   ` Christoph Lameter
2004-09-16 18:14   ` Vojtech Pavlik
2004-09-16 18:35     ` Jesse Barnes
2004-09-16 20:34       ` Vojtech Pavlik
2004-09-16 18:46     ` Christoph Lameter
2004-09-20 21:53       ` Bjorn Helgaas
2004-09-16 16:32 ` Christoph Lameter
2004-09-16 16:54   ` Bjorn Helgaas
2004-09-16 18:07     ` Robert Picco
2004-09-16 20:05       ` Christoph Lameter
2004-09-17  1:34         ` Robert Picco [this message]
2004-09-16 18:17     ` Vojtech Pavlik
     [not found] <Pine.LNX.4.58.0409082058140.28678@schroedinger.engr.sgi.com>
     [not found] ` <20040908210537.585120c1.akpm@osdl.org>
2004-09-09  5:12   ` Christoph Lameter
2004-09-09  6:43     ` Jesse Barnes
2004-09-10 19:54       ` Christoph Lameter
2004-09-11 10:50         ` Christoph Hellwig
2004-09-11 15:32           ` Christoph Lameter

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