From: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
To: Lizhi Hou <lizhi.hou@amd.com>,
ogabbay@kernel.org, quic_jhugo@quicinc.com,
Mario.Limonciello@amd.com, dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org, min.ma@amd.com, max.zhen@amd.com,
sonal.santan@amd.com, king.tam@amd.com
Subject: Re: [PATCH V2] accel/amdxdna: Check interrupt register before mailbox_rx_worker exits
Date: Thu, 27 Feb 2025 09:36:49 +0100 [thread overview]
Message-ID: <41667dcc-b57d-44ff-99cf-5a91dbec1e56@linux.intel.com> (raw)
In-Reply-To: <20250226161810.4188334-1-lizhi.hou@amd.com>
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
On 2/26/2025 5:18 PM, Lizhi Hou wrote:
> There is a timeout failure been found during stress tests. If the firmware
> generates a mailbox response right after driver clears the mailbox channel
> interrupt register, the hardware will not generate an interrupt for the
> response. This causes the unexpected mailbox command timeout.
>
> To handle this failure, driver checks the interrupt register before
> exiting mailbox_rx_worker(). If there is a new response, driver goes back
> to process it.
>
> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
> ---
> drivers/accel/amdxdna/amdxdna_mailbox.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/accel/amdxdna/amdxdna_mailbox.c b/drivers/accel/amdxdna/amdxdna_mailbox.c
> index de7bf0fb4594..8651b1d3c3ab 100644
> --- a/drivers/accel/amdxdna/amdxdna_mailbox.c
> +++ b/drivers/accel/amdxdna/amdxdna_mailbox.c
> @@ -348,8 +348,6 @@ static irqreturn_t mailbox_irq_handler(int irq, void *p)
> trace_mbox_irq_handle(MAILBOX_NAME, irq);
> /* Schedule a rx_work to call the callback functions */
> queue_work(mb_chann->work_q, &mb_chann->rx_work);
> - /* Clear IOHUB register */
> - mailbox_reg_write(mb_chann, mb_chann->iohub_int_addr, 0);
>
> return IRQ_HANDLED;
> }
> @@ -366,6 +364,9 @@ static void mailbox_rx_worker(struct work_struct *rx_work)
> return;
> }
>
> +again:
> + mailbox_reg_write(mb_chann, mb_chann->iohub_int_addr, 0);
> +
> while (1) {
> /*
> * If return is 0, keep consuming next message, until there is
> @@ -379,10 +380,18 @@ static void mailbox_rx_worker(struct work_struct *rx_work)
> if (unlikely(ret)) {
> MB_ERR(mb_chann, "Unexpected ret %d, disable irq", ret);
> WRITE_ONCE(mb_chann->bad_state, true);
> - disable_irq(mb_chann->msix_irq);
> - break;
> + return;
> }
> }
> +
> + /*
> + * The hardware will not generate interrupt if firmware creates a new
> + * response right after driver clears interrupt register. Check
> + * the interrupt register to make sure there is not any new response
> + * before exiting.
> + */
> + if (mailbox_reg_read(mb_chann, mb_chann->iohub_int_addr))
> + goto again;
> }
>
> int xdna_mailbox_send_msg(struct mailbox_channel *mb_chann,
next prev parent reply other threads:[~2025-02-27 8:36 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-26 16:18 [PATCH V2] accel/amdxdna: Check interrupt register before mailbox_rx_worker exits Lizhi Hou
2025-02-27 8:36 ` Jacek Lawrynowicz [this message]
2025-02-27 15:00 ` Mario Limonciello
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