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* APIC, changing level/edge interrupt
@ 2004-12-28 17:27 Pierre Ossman
  2005-01-01  5:49 ` Tim Hockin
  0 siblings, 1 reply; 5+ messages in thread
From: Pierre Ossman @ 2004-12-28 17:27 UTC (permalink / raw)
  To: LKML

How do you tell the APIC that a device uses level triggered interrupts, 
not edge triggered? I have a flash reader on the LPC bus which uses 
level triggered interrupts and /proc/interrupts show edge triggered. 
Some interrupts are missed by the APIC so I figured this might be why.

Rgds
Pierre

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: APIC, changing level/edge interrupt
  2004-12-28 17:27 APIC, changing level/edge interrupt Pierre Ossman
@ 2005-01-01  5:49 ` Tim Hockin
  2005-01-01 15:56   ` Pierre Ossman
  0 siblings, 1 reply; 5+ messages in thread
From: Tim Hockin @ 2005-01-01  5:49 UTC (permalink / raw)
  To: Pierre Ossman; +Cc: LKML

On Tue, Dec 28, 2004 at 06:27:25PM +0100, Pierre Ossman wrote:
> How do you tell the APIC that a device uses level triggered interrupts, 
> not edge triggered? I have a flash reader on the LPC bus which uses 
> level triggered interrupts and /proc/interrupts show edge triggered. 
> Some interrupts are missed by the APIC so I figured this might be why.

BIOS should set this up.  Maybe ACPI has a way to do this?

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: APIC, changing level/edge interrupt
  2005-01-01  5:49 ` Tim Hockin
@ 2005-01-01 15:56   ` Pierre Ossman
  2005-01-01 20:24     ` Tim Hockin
  0 siblings, 1 reply; 5+ messages in thread
From: Pierre Ossman @ 2005-01-01 15:56 UTC (permalink / raw)
  To: Tim Hockin; +Cc: LKML

Tim Hockin wrote:

>On Tue, Dec 28, 2004 at 06:27:25PM +0100, Pierre Ossman wrote:
>  
>
>>How do you tell the APIC that a device uses level triggered interrupts, 
>>not edge triggered? I have a flash reader on the LPC bus which uses 
>>level triggered interrupts and /proc/interrupts show edge triggered. 
>>Some interrupts are missed by the APIC so I figured this might be why.
>>    
>>
>
>BIOS should set this up.  Maybe ACPI has a way to do this?
>  
>
Should doesn't always mean that it actually does ;)
But since BIOS can configure the APIC then the kernel should be able to 
also. A quick and dirty hack will suffice ATM since I just want to 
pinpoint where the problem is.
What is the default mode and what does the XT-PIC expect? (it works fine 
with the apic disabled).

ACPI might have some functions to configure the APIC correctly but right 
now the connection between ACPI and drivers is rather weak (non-existant 
for this driver) so that's not really a viable solution when testing. 
Might be a good long term solution though.

Rgds
Pierre


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: APIC, changing level/edge interrupt
  2005-01-01 15:56   ` Pierre Ossman
@ 2005-01-01 20:24     ` Tim Hockin
  2005-01-01 21:22       ` Pierre Ossman
  0 siblings, 1 reply; 5+ messages in thread
From: Tim Hockin @ 2005-01-01 20:24 UTC (permalink / raw)
  To: Pierre Ossman; +Cc: LKML

On Sat, Jan 01, 2005 at 04:56:15PM +0100, Pierre Ossman wrote:
> >BIOS should set this up.  Maybe ACPI has a way to do this?

> Should doesn't always mean that it actually does ;)

Of course.  My point was that if it does not, it's a bug in the BIOS.  

> But since BIOS can configure the APIC then the kernel should be able to 

Of course, but the kernel has no way to know whether a device should be
edge or level triggered unless you have a driver for that device.  And
even if you do, I don't know that there is an API in kernel to say
set_irq_mode(IRQ_EDGE) (though there could be).

> What is the default mode and what does the XT-PIC expect? (it works fine 
> with the apic disabled).

I think default is PIC-compatible which is edge by default.  I think.  I
don;t have the book here.

> ACPI might have some functions to configure the APIC correctly but right 
> now the connection between ACPI and drivers is rather weak (non-existant 
> for this driver) so that's not really a viable solution when testing. 
> Might be a good long term solution though.

I know ACPI can get the information with the _PRS and _CRS methods.  The
OSPM core should probably be re-programming the (A)PIC appropriately.  Of
course, that depends on the BIOS vendor getting the ACPI correct, too.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: APIC, changing level/edge interrupt
  2005-01-01 20:24     ` Tim Hockin
@ 2005-01-01 21:22       ` Pierre Ossman
  0 siblings, 0 replies; 5+ messages in thread
From: Pierre Ossman @ 2005-01-01 21:22 UTC (permalink / raw)
  To: Tim Hockin; +Cc: LKML

Tim Hockin wrote:

>Of course.  My point was that if it does not, it's a bug in the BIOS.  
>
>  
>
Something Windows doesn't seem to be affected by so I don't think we'll 
get much help fixing the bios.

>>But since BIOS can configure the APIC then the kernel should be able to 
>>    
>>
>
>Of course, but the kernel has no way to know whether a device should be
>edge or level triggered unless you have a driver for that device.  And
>even if you do, I don't know that there is an API in kernel to say
>set_irq_mode(IRQ_EDGE) (though there could be).
>
>  
>
There are some calls in the ACPI layer which plays with the level/edge 
stuff but they don't seem very generic. Besides, what I want right now 
is just some possibility of confirming that this level/edge business is 
the cause of all these problems.

>>What is the default mode and what does the XT-PIC expect? (it works fine 
>>with the apic disabled).
>>    
>>
>
>I think default is PIC-compatible which is edge by default.  I think.  I
>don;t have the book here.
>
>  
>
Ok. The default from the device is level mode which works fine on PIC 
systems. I'm not sure that the hardware actually respects this bit 
because level/pulse mode doesn't make any difference on either PIC or 
APIC systems.

Rgds
Pierre


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2005-01-01 21:22 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2004-12-28 17:27 APIC, changing level/edge interrupt Pierre Ossman
2005-01-01  5:49 ` Tim Hockin
2005-01-01 15:56   ` Pierre Ossman
2005-01-01 20:24     ` Tim Hockin
2005-01-01 21:22       ` Pierre Ossman

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