Re: [PATCH 1/1] pci: Block config access during BIST (resend)

[Brian King <brking@us.ibm.com>]

Andi Kleen wrote:
> brking@us.ibm.com writes:
> 
> 
>>Some PCI adapters (eg. ipr scsi adapters) have an exposure today in that 
>>they issue BIST to the adapter to reset the card. If, during the time
>>it takes to complete BIST, userspace attempts to access PCI config space, 
>>the host bus bridge will master abort the access since the ipr adapter 
>>does not respond on the PCI bus for a brief period of time when running BIST. 
>>On PPC64 hardware, this master abort results in the host PCI bridge
>>isolating that PCI device from the rest of the system, making the device
>>unusable until Linux is rebooted. This patch is an attempt to close that
>>exposure by introducing some blocking code in the PCI code. When blocked,
>>writes will be humored and reads will return the cached value. Ben
>>Herrenschmidt has also mentioned that he plans to use this in PPC power
>>management.
> 
> 
> I think it would be better to do this check higher level in the driver.
> IMHO pci_*_config should stay lean and fast low level functions without
> such baggage. 

The problem I am trying to solve is the userspace PCI access methods 
accessing my config space when the adapter is not able to handle such an 
access. Today these accesses bypass the device driver altogether and 
there is no way to stop them. An alternative to this patch would be to 
only do these checks for the PCI config accesses initiated from the 
various userspace mechanisms, but I'm not sure the patch would then be 
usable for what benh wanted it for. Ben?



-- 
Brian King
eServer Storage I/O
IBM Linux Technology Center