[PATCH 0/8] Add support for PCIe3 on x1e80100

Qiang Yu
2024-08-27T06:37:00Z

This series add support for PCIe3 on x1e80100.

PCIe3 needs additional set of clocks, regulators and new set of PCIe QMP
PHY configuration compare other PCIe instances on x1e80100. Hence add
required resource configuration and usage for PCIe3.

Qiang Yu (8):
phy: qcom-qmp: pcs-pcie: Add v6.30 register offsets
phy: qcom-qmp: pcs: Add v6.30 register offsets
phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3
arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100
QMP PCIe PHY Gen4 x8
clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks
arm64: dts: qcom: x1e80100-qcp: Add power supply and sideband signal
for pcie3
PCI: qcom: Add support to PCIe slot power supplies

.../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 18 +-
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 116 +++++++++
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 205 +++++++++++++++-
drivers/clk/qcom/gcc-x1e80100.c | 10 +-
drivers/pci/controller/dwc/pcie-qcom.c | 52 +++-
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 222 +++++++++++++++++-
.../qualcomm/phy-qcom-qmp-pcs-pcie-v6_30.h | 25 ++
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_30.h | 19 ++
8 files changed, 657 insertions(+), 10 deletions(-)
create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6_30.h
create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_30.h

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2.34.1