Question on CONFIG_IRQBALANCE / 2.6.x

Question on CONFIG_IRQBALANCE / 2.6.x

[Joerg Sommrey]

Hi all,

there's something I don't understand:  With IRQBALANCE *enabled* almost
all interrupts are processed on CPU0.  This changed in an unexpected way
after disabling IRQBALANCE: now all interrupts are distributed uniformly
to both CPUs.  Maybe it's intentional, but it's not what I expect when a
config option named IRQBALANCE is *disabled*.

Can anybody comment on this?

Thanks,
-jo

-- 
-rw-r--r--  1 jo users 63 2005-02-18 21:21 /home/jo/.signature

Re: Question on CONFIG_IRQBALANCE / 2.6.x

[Martin J. Bligh]

> 
> there's something I don't understand:  With IRQBALANCE *enabled* almost
> all interrupts are processed on CPU0.  This changed in an unexpected way
> after disabling IRQBALANCE: now all interrupts are distributed uniformly
> to both CPUs.  Maybe it's intentional, but it's not what I expect when a
> config option named IRQBALANCE is *disabled*.
> 
> Can anybody comment on this?

If you have a Pentium 3 based system, by default they'll round robin.
If you turn on IRQbalance, they won't move until the traffic gets high
enough load to matter. That's presumably what you're seeing.

m.

Re: Question on CONFIG_IRQBALANCE / 2.6.x

[Joerg Sommrey]

On Fri, Feb 18, 2005 at 02:39:49PM -0800, Martin J. Bligh wrote:
> > 
> > there's something I don't understand:  With IRQBALANCE *enabled* almost
> > all interrupts are processed on CPU0.  This changed in an unexpected way
> > after disabling IRQBALANCE: now all interrupts are distributed uniformly
> > to both CPUs.  Maybe it's intentional, but it's not what I expect when a
> > config option named IRQBALANCE is *disabled*.
> > 
> > Can anybody comment on this?
> 
> If you have a Pentium 3 based system, by default they'll round robin.
> If you turn on IRQbalance, they won't move until the traffic gets high
> enough load to matter. That's presumably what you're seeing.

It's an Athlon box that propably has the same behaviour.  Just another
question on this topic:  with IRQBALANCE enabled, almost all interupts
are routet to CPU0.  Lately irq 0 runs on CPU1 and never returns to CPU0
- is there any obvious reason for that?

-jo

-- 
-rw-r--r--  1 jo users 63 2005-02-18 23:29 /home/jo/.signature

Re: Question on CONFIG_IRQBALANCE / 2.6.x

[Jeff Garzik]

Joerg Sommrey wrote:
> On Fri, Feb 18, 2005 at 02:39:49PM -0800, Martin J. Bligh wrote:
> 
>>>there's something I don't understand:  With IRQBALANCE *enabled* almost
>>>all interrupts are processed on CPU0.  This changed in an unexpected way
>>>after disabling IRQBALANCE: now all interrupts are distributed uniformly
>>>to both CPUs.  Maybe it's intentional, but it's not what I expect when a
>>>config option named IRQBALANCE is *disabled*.
>>>
>>>Can anybody comment on this?
>>
>>If you have a Pentium 3 based system, by default they'll round robin.
>>If you turn on IRQbalance, they won't move until the traffic gets high
>>enough load to matter. That's presumably what you're seeing.
> 
> 
> It's an Athlon box that propably has the same behaviour.  Just another
> question on this topic:  with IRQBALANCE enabled, almost all interupts
> are routet to CPU0.  Lately irq 0 runs on CPU1 and never returns to CPU0
> - is there any obvious reason for that?

Note that it is a popular recommendation to -disable- CONFIG_IRQBALANCE, 
and then run the userspace 'irqbalanced'.

	Jeff

Re: Question on CONFIG_IRQBALANCE / 2.6.x

[Martin J. Bligh]

>> > there's something I don't understand:  With IRQBALANCE *enabled* almost
>> > all interrupts are processed on CPU0.  This changed in an unexpected way
>> > after disabling IRQBALANCE: now all interrupts are distributed uniformly
>> > to both CPUs.  Maybe it's intentional, but it's not what I expect when a
>> > config option named IRQBALANCE is *disabled*.
>> > 
>> > Can anybody comment on this?
>> 
>> If you have a Pentium 3 based system, by default they'll round robin.
>> If you turn on IRQbalance, they won't move until the traffic gets high
>> enough load to matter. That's presumably what you're seeing.
> 
> It's an Athlon box that propably has the same behaviour.  Just another
> question on this topic:  with IRQBALANCE enabled, almost all interupts
> are routet to CPU0.  Lately irq 0 runs on CPU1 and never returns to CPU0
> - is there any obvious reason for that?

If it's not getting interrupts at 1010 per second or so, it won't rotate
them, on the grounds it's not worthwhile.

M.