Re: More latency regressions with 2.6.11-rc4-RT-V0.7.39-02

[Nick Piggin <nickpiggin@yahoo.com.au>]

Lee Revell wrote:
> On Thu, 2005-02-24 at 10:27 +1100, Nick Piggin wrote: 

>>If you are using i386 with 2-level page tables (no highmem), then
>>the behaviour should be more or less identical. Odd.
> 
> 
> IIRC last time I really tested this a few months ago, the worst case
> latency on that machine was about 150us.  Currently its 422us from the
> same clear_page_range code path.
> 
> On my Athlon XP the clear_page_range latency is not showing up at all,
> and the worst delay so far is only 35us, most of which is the timer
> interrupt IOW that machine is showing the best achievable latency (with
> PREEMPT_DESKTOP).  The machine seeing 422 us latencies in
> clear_page_range is a 600Mhz C3, which is known to be a FSB limited
> architecture.
> 

Well it should be pretty trivial to add a break in there.
I don't think it can get into 2.6.11 at this point though,
so we'll revisit this for 2.6.12 if the clear_page_range
optimisations don't get anywhere.

Nick