From: Eric Dumazet <dada1@cosmosbay.com>
To: Andi Kleen <ak@suse.de>, linux-kernel@vger.kernel.org
Subject: [PATCH] x86_64 : prefetchw() can fall back to prefetch() if !3DNOW
Date: Thu, 28 Jul 2005 19:10:41 +0200 [thread overview]
Message-ID: <42E91191.60603@cosmosbay.com> (raw)
In-Reply-To: <86802c44050728092275e28a9a@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 396 bytes --]
[PATCH] x86_64 : prefetchw() can fall back to prefetch() if !3DNOW
If the cpu lacks 3DNOW feature, we can use a normal prefetcht0 instruction instead of NOP5.
"prefetchw (%rxx)" and "prefetcht0 (%rxx)" have the same length, ranging from 3 to 5 bytes
depending on the register. So this patch even helps AMD64, shortening the length of the code.
Signed-off-by: Eric Dumazet <dada1@cosmosbay.com>
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[-- Type: text/plain, Size: 407 bytes --]
--- linux-2.6.13-rc3/include/asm-x86_64/processor.h 2005-07-13 06:46:46.000000000 +0200
+++ linux-2.6.13-rc3-ed/include/asm-x86_64/processor.h 2005-07-28 18:47:39.000000000 +0200
@@ -398,7 +398,7 @@
#define ARCH_HAS_PREFETCHW 1
static inline void prefetchw(void *x)
{
- alternative_input(ASM_NOP5,
+ alternative_input("prefetcht0 (%1)",
"prefetchw (%1)",
X86_FEATURE_3DNOW,
"r" (x));
next prev parent reply other threads:[~2005-07-28 17:12 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-07-28 4:03 [PATCH] x86_64: sync_tsc fix the race (so we can boot) Eric W. Biederman
2005-07-28 16:22 ` yhlu
2005-07-28 17:10 ` Eric Dumazet [this message]
2005-08-03 13:17 ` [PATCH] x86_64 : prefetchw() can fall back to prefetch() if !3DNOW Andi Kleen
2005-07-28 17:35 ` [PATCH] x86_64: sync_tsc fix the race (so we can boot) yhlu
2005-07-29 3:08 ` Eric W. Biederman
2005-07-29 20:41 ` yhlu
2005-07-29 23:27 ` yhlu
2005-07-30 0:40 ` Eric W. Biederman
2005-07-30 0:52 ` yhlu
2005-07-30 1:45 ` yhlu
2005-07-29 7:44 ` Andi Kleen
2005-07-29 15:52 ` Eric W. Biederman
2005-07-29 16:04 ` Eric W. Biederman
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