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From: Zachary Amsden <zach@vmware.com>
To: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Cc: Pavel Machek <pavel@ucw.cz>,
	akpm@osdl.org, chrisl@vmware.com, davej@codemonkey.org.uk,
	hpa@zytor.com, linux-kernel@vger.kernel.org, pratap@vmware.com,
	Riley@Williams.Name
Subject: Re: [PATCH] 2/6 i386 serialize-msr
Date: Sat, 30 Jul 2005 10:55:50 -0700	[thread overview]
Message-ID: <42EBBF26.3070101@vmware.com> (raw)
In-Reply-To: <Pine.LNX.4.61.0507301157530.29844@montezuma.fsmlabs.com>

[-- Attachment #1: Type: text/plain, Size: 348 bytes --]

'Apparently' I need to make some coffee :)

Zwane Mwaikambo wrote:

> 	wrmsr(MSR_IA32_UCODE_REV, 0, 0);
>-	__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
>+	/* see 1.07.  Apprent chip bug */
>+	serialize_cpu(); 
>
>1.07 in which document? Also, please just spell 'apparent' correctly, 
>saving 1 byte really just looks lazy.
>
>  
>


[-- Attachment #2: serialize-msr --]
[-- Type: text/plain, Size: 1993 bytes --]

i386 arch cleanup.  Introduce the serialize macro to serialize processor state.
Why the microcode update needs it I am not quite sure, since wrmsr() is already
a serializing instruction, but it is a microcode update, so I will keep the
semantic the same, since this could be a timing workaround.  As far as I can
tell, this has always been there since the original microcode update source.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Index: linux-2.6.13/arch/i386/kernel/microcode.c
===================================================================
--- linux-2.6.13.orig/arch/i386/kernel/microcode.c	2005-07-29 15:26:04.000000000 -0700
+++ linux-2.6.13/arch/i386/kernel/microcode.c	2005-07-30 10:55:02.000000000 -0700
@@ -164,7 +164,8 @@
 	}
 
 	wrmsr(MSR_IA32_UCODE_REV, 0, 0);
-	__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
+	/* see notes above for revision 1.07.  Apparent chip bug */
+	serialize_cpu(); 
 	/* get the current revision from MSR 0x8B */
 	rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
 	pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
@@ -377,7 +378,9 @@
 		(unsigned long) uci->mc->bits >> 16 >> 16);
 	wrmsr(MSR_IA32_UCODE_REV, 0, 0);
 
-	__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
+	/* see notes above for revision 1.07.  Apparent chip bug */
+	serialize_cpu(); 
+
 	/* get the current revision from MSR 0x8B */
 	rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
 
Index: linux-2.6.13/include/asm-i386/processor.h
===================================================================
--- linux-2.6.13.orig/include/asm-i386/processor.h	2005-07-29 15:26:53.000000000 -0700
+++ linux-2.6.13/include/asm-i386/processor.h	2005-07-30 10:32:44.000000000 -0700
@@ -277,6 +277,11 @@
 	outb((data), 0x23); \
 } while (0)
 
+static inline void serialize_cpu(void)
+{
+	 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
+}
+
 static inline void __monitor(const void *eax, unsigned long ecx,
 		unsigned long edx)
 {

      reply	other threads:[~2005-07-30 18:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-07-30  4:04 [PATCH] 2/6 i386 serialize-msr zach
2005-07-30 10:32 ` Pavel Machek
2005-07-30 17:43   ` Zachary Amsden
2005-07-30 17:59     ` Zwane Mwaikambo
2005-07-30 17:55       ` Zachary Amsden [this message]

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