Hi
I was told that if I had a patch to submit for a baseline change that 
this was the place to do it.
If not, please let me know...

thanks,
morrow

Patched against 2.6.11 baseline
problems fixed:
1) OHCI_INTR_RD not being cleared in ohci interrupt handler
 results in interrupt storm and system hang on RD status.
 ohci spec indicates this should be done.
2) PORT_CSC not being cleared in ehci_hub_status_data
 code attempts to clear bit, but bit is write to clear.
 there are other errant clears, since the PORTSCn regs
 have 3 RWC bits, and the rest are RW. All stmts of the form:
   writel (v, &ehci->regs->port_status[i])
 should clear RWC bits if they do not intend to clear status,
 and should set the bits which should be cleared (this case).
3) loop control and subsequent port resume/reset not correct.
 unsigned index made detecting port1 active impossible, and
 OWNER/POWER status was being ignored on ports assigned
 to companion controller.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>