[PATCH v2 1/4] scsi: ufs: ufs-mediatek: Add UFS host support for MT8195 SoC

[PATCH v2 1/4] scsi: ufs: ufs-mediatek: Add UFS host support for MT8195 SoC

[Macpaul Lin]

Add "mediatek,mt8195-ufshci" to the of_device_id table to enable
support for MediaTek MT8195/MT8395 UFS host controller. This matches the
device node entry in the MT8195/MT8395 device tree and allows proper driver
binding.

Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 1 +
 1 file changed, 1 insertion(+)

Changes vor f2:
 - No change.

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 182f58d0c9db..e1dbf0231c5e 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -50,6 +50,7 @@ static const struct ufs_dev_quirk ufs_mtk_dev_fixups[] = {
 
 static const struct of_device_id ufs_mtk_of_match[] = {
 	{ .compatible = "mediatek,mt8183-ufshci" },
+	{ .compatible = "mediatek,mt8195-ufshci" },
 	{},
 };
 MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
-- 
2.45.2

[PATCH v2 2/4] dt-bindings: ufs: mediatek,ufs: add ufs-disable-mcq flag for UFS host

[Macpaul Lin]

Add the 'mediatek,ufs-disable-mcq' property to the UFS device-tree
bindings. This flag corresponds to the UFS_MTK_CAP_DISABLE_MCQ host
capability recently introduced in the UFS host driver, allowing it
to disable the Multiple Circular Queue (MCQ) feature when present.
The binding schema has also been updated to resolve DTBS check errors.

Cc: stable@vger.kernel.org
Fixes: 46bd3e31d74b ("scsi: ufs: mediatek: Add UFS_MTK_CAP_DISABLE_MCQ")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 4 ++++
 1 file changed, 4 insertions(+)

Changes for v2:
 - Split new property from the origin patch.
 - Add dependency description. Since the code in ufs-mediatek.c
   has been backport to stable tree. The dt-bindings should be backport
   to the same stable tree as well.

diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index 32fd535a514a..20f341d25ebc 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -33,6 +33,10 @@ properties:
 
   vcc-supply: true
 
+  mediatek,ufs-disable-mcq:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description: The mask to disable MCQ (Multi-Circular Queue) for UFS host.
+
 required:
   - compatible
   - clocks
-- 
2.45.2

Re: [PATCH v2 2/4] dt-bindings: ufs: mediatek,ufs: add ufs-disable-mcq flag for UFS host

[Rob Herring (Arm)]

On Tue, 22 Jul 2025 16:57:18 +0800, Macpaul Lin wrote:
> Add the 'mediatek,ufs-disable-mcq' property to the UFS device-tree
> bindings. This flag corresponds to the UFS_MTK_CAP_DISABLE_MCQ host
> capability recently introduced in the UFS host driver, allowing it
> to disable the Multiple Circular Queue (MCQ) feature when present.
> The binding schema has also been updated to resolve DTBS check errors.
> 
> Cc: stable@vger.kernel.org
> Fixes: 46bd3e31d74b ("scsi: ufs: mediatek: Add UFS_MTK_CAP_DISABLE_MCQ")
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>  Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> Changes for v2:
>  - Split new property from the origin patch.
>  - Add dependency description. Since the code in ufs-mediatek.c
>    has been backport to stable tree. The dt-bindings should be backport
>    to the same stable tree as well.
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

Re: [PATCH v2 2/4] dt-bindings: ufs: mediatek,ufs: add ufs-disable-mcq flag for UFS host

[Peter Wang (王信友)]

On Tue, 2025-07-22 at 16:57 +0800, Macpaul Lin wrote:
> Add the 'mediatek,ufs-disable-mcq' property to the UFS device-tree
> bindings. This flag corresponds to the UFS_MTK_CAP_DISABLE_MCQ host
> capability recently introduced in the UFS host driver, allowing it
> to disable the Multiple Circular Queue (MCQ) feature when present.
> The binding schema has also been updated to resolve DTBS check
> errors.
> 
> Cc: stable@vger.kernel.org
> Fixes: 46bd3e31d74b ("scsi: ufs: mediatek: Add
> UFS_MTK_CAP_DISABLE_MCQ")
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>  Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> Changes for v2:
>  - Split new property from the origin patch.
>  - Add dependency description. Since the code in ufs-mediatek.c
>    has been backport to stable tree. The dt-bindings should be
> backport
>    to the same stable tree as well.
> 
> diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> index 32fd535a514a..20f341d25ebc 100644
> --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> @@ -33,6 +33,10 @@ properties:
>  
>    vcc-supply: true
>  
> +  mediatek,ufs-disable-mcq:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description: The mask to disable MCQ (Multi-Circular Queue) for
> UFS host.
> +
>  required:
>    - compatible
>    - clocks

Reviewed-by: Peter Wang <peter.wang@mediatek.com>

[PATCH v2 3/4] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes

[Macpaul Lin]

Add MT8195 UFSHCI compatible string.
Relax the schema to allow between one to eight clocks/clock-names
entries for all MediaTek UFS nodes. Legacy platforms may only need
a few clocks, whereas newer devices such as the MT8195 require
additional clock-gating domains. For MT8195 specifically, enforce
exactly eight clocks and clock-names entries to satisfy its hardware
requirements.

Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
 .../devicetree/bindings/ufs/mediatek,ufs.yaml | 42 ++++++++++++++++---
 1 file changed, 36 insertions(+), 6 deletions(-)

Changes for v2:
 - Remove duplicate minItems and maxItems as suggested in the review.
 - Add a description of how the MT8195 hardware differs from earlier
   platforms.

diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index 20f341d25ebc..1dec54fb00f3 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -9,21 +9,20 @@ title: Mediatek Universal Flash Storage (UFS) Controller
 maintainers:
   - Stanley Chu <stanley.chu@mediatek.com>
 
-allOf:
-  - $ref: ufs-common.yaml
-
 properties:
   compatible:
     enum:
       - mediatek,mt8183-ufshci
       - mediatek,mt8192-ufshci
+      - mediatek,mt8195-ufshci
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 8
 
   clock-names:
-    items:
-      - const: ufs
+    minItems: 1
+    maxItems: 8
 
   phys:
     maxItems: 1
@@ -47,6 +46,37 @@ required:
 
 unevaluatedProperties: false
 
+allOf:
+  - $ref: ufs-common.yaml
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - mediatek,mt8195-ufshci
+    then:
+      properties:
+        clocks:
+          minItems: 8
+        clock-names:
+          items:
+            - const: ufs
+            - const: ufs_aes
+            - const: ufs_tick
+            - const: unipro_sysclk
+            - const: unipro_tick
+            - const: unipro_mp_bclk
+            - const: ufs_tx_symbol
+            - const: ufs_mem_sub
+    else:
+      properties:
+        clocks:
+          maxItems: 1
+        clock-names:
+          items:
+            - const: ufs
+
 examples:
   - |
     #include <dt-bindings/clock/mt8183-clk.h>
-- 
2.45.2

Re: [PATCH v2 3/4] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes

[AngeloGioacchino Del Regno]

Il 22/07/25 10:57, Macpaul Lin ha scritto:
> Add MT8195 UFSHCI compatible string.
> Relax the schema to allow between one to eight clocks/clock-names
> entries for all MediaTek UFS nodes. Legacy platforms may only need
> a few clocks, whereas newer devices such as the MT8195 require
> additional clock-gating domains. For MT8195 specifically, enforce
> exactly eight clocks and clock-names entries to satisfy its hardware
> requirements.
> 
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>   .../devicetree/bindings/ufs/mediatek,ufs.yaml | 42 ++++++++++++++++---
>   1 file changed, 36 insertions(+), 6 deletions(-)
> 
> Changes for v2:
>   - Remove duplicate minItems and maxItems as suggested in the review.
>   - Add a description of how the MT8195 hardware differs from earlier
>     platforms.
> 
> diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> index 20f341d25ebc..1dec54fb00f3 100644
> --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> @@ -9,21 +9,20 @@ title: Mediatek Universal Flash Storage (UFS) Controller
>   maintainers:
>     - Stanley Chu <stanley.chu@mediatek.com>
>   
> -allOf:
> -  - $ref: ufs-common.yaml
> -
>   properties:
>     compatible:
>       enum:
>         - mediatek,mt8183-ufshci
>         - mediatek,mt8192-ufshci
> +      - mediatek,mt8195-ufshci
>   
>     clocks:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 8
>   
>     clock-names:
> -    items:
> -      - const: ufs
> +    minItems: 1
> +    maxItems: 8
>   
>     phys:
>       maxItems: 1
> @@ -47,6 +46,37 @@ required:
>   
>   unevaluatedProperties: false
>   
> +allOf:
> +  - $ref: ufs-common.yaml
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - mediatek,mt8195-ufshci
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 8
> +        clock-names:
> +          items:
> +            - const: ufs
> +            - const: ufs_aes
> +            - const: ufs_tick
> +            - const: unipro_sysclk
> +            - const: unipro_tick
> +            - const: unipro_mp_bclk

The unipro mp_bclk really is the ufs-sap clock; besides, the standard has clocks
for both TX and RX symbols - and also MT8195 (and also MT6991, MT8196, and others)
UFS controller do have both TX and RX symbol clocks.

Besides, you're also missing the crypto clocks for UFS, which brings the count to
12 total clocks for MT8195.

Please, look at my old submission, which actually fixes the compatibles other than
adding the right clocks for all UFS controllers in MediaTek platforms.

https://lore.kernel.org/all/20240612074309.50278-1-angelogioacchino.delregno@collabora.com/

I want to take the occasion to remind everyone that my fixes were discarded because
the MediaTek UFS driver maintainer wants to keep the low quality of the driver in
favor of easier downstream porting - which is *not* in any way adhering to quality
standards that the Linux community deserves.

Cheers,
Angelo

> +            - const: ufs_tx_symbol
> +            - const: ufs_mem_sub
> +    else:
> +      properties:
> +        clocks:
> +          maxItems: 1
> +        clock-names:
> +          items:
> +            - const: ufs
> +
>   examples:
>     - |
>       #include <dt-bindings/clock/mt8183-clk.h>

Re: [PATCH v2 3/4] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes

[Rob Herring]

On Tue, Jul 22, 2025 at 11:39:54AM +0200, AngeloGioacchino Del Regno wrote:
> Il 22/07/25 10:57, Macpaul Lin ha scritto:
> > Add MT8195 UFSHCI compatible string.
> > Relax the schema to allow between one to eight clocks/clock-names
> > entries for all MediaTek UFS nodes. Legacy platforms may only need
> > a few clocks, whereas newer devices such as the MT8195 require
> > additional clock-gating domains. For MT8195 specifically, enforce
> > exactly eight clocks and clock-names entries to satisfy its hardware
> > requirements.
> > 
> > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> > ---
> >   .../devicetree/bindings/ufs/mediatek,ufs.yaml | 42 ++++++++++++++++---
> >   1 file changed, 36 insertions(+), 6 deletions(-)
> > 
> > Changes for v2:
> >   - Remove duplicate minItems and maxItems as suggested in the review.
> >   - Add a description of how the MT8195 hardware differs from earlier
> >     platforms.
> > 
> > diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > index 20f341d25ebc..1dec54fb00f3 100644
> > --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > @@ -9,21 +9,20 @@ title: Mediatek Universal Flash Storage (UFS) Controller
> >   maintainers:
> >     - Stanley Chu <stanley.chu@mediatek.com>
> > -allOf:
> > -  - $ref: ufs-common.yaml
> > -
> >   properties:
> >     compatible:
> >       enum:
> >         - mediatek,mt8183-ufshci
> >         - mediatek,mt8192-ufshci
> > +      - mediatek,mt8195-ufshci
> >     clocks:
> > -    maxItems: 1
> > +    minItems: 1
> > +    maxItems: 8
> >     clock-names:
> > -    items:
> > -      - const: ufs
> > +    minItems: 1
> > +    maxItems: 8
> >     phys:
> >       maxItems: 1
> > @@ -47,6 +46,37 @@ required:
> >   unevaluatedProperties: false
> > +allOf:
> > +  - $ref: ufs-common.yaml
> > +
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - mediatek,mt8195-ufshci
> > +    then:
> > +      properties:
> > +        clocks:
> > +          minItems: 8
> > +        clock-names:
> > +          items:
> > +            - const: ufs
> > +            - const: ufs_aes
> > +            - const: ufs_tick
> > +            - const: unipro_sysclk
> > +            - const: unipro_tick
> > +            - const: unipro_mp_bclk
> 
> The unipro mp_bclk really is the ufs-sap clock; besides, the standard has clocks
> for both TX and RX symbols - and also MT8195 (and also MT6991, MT8196, and others)
> UFS controller do have both TX and RX symbol clocks.
> 
> Besides, you're also missing the crypto clocks for UFS, which brings the count to
> 12 total clocks for MT8195.
> 
> Please, look at my old submission, which actually fixes the compatibles other than
> adding the right clocks for all UFS controllers in MediaTek platforms.
> 
> https://lore.kernel.org/all/20240612074309.50278-1-angelogioacchino.delregno@collabora.com/
> 
> I want to take the occasion to remind everyone that my fixes were discarded because
> the MediaTek UFS driver maintainer wants to keep the low quality of the driver in
> favor of easier downstream porting - which is *not* in any way adhering to quality
> standards that the Linux community deserves.

Sounds like we need a new maintainer then. They clearly don't understand 
that downstream doesn't exist.

Rob

Re: [PATCH v2 3/4] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes

[Macpaul Lin (林智斌)]

On Tue, 2025-07-22 at 11:39 +0200, AngeloGioacchino Del Regno wrote:
> 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 

[snip...]

> The unipro mp_bclk really is the ufs-sap clock; besides, the standard
> has clocks
> for both TX and RX symbols - and also MT8195 (and also MT6991,
> MT8196, and others)
> UFS controller do have both TX and RX symbol clocks.
> 
> Besides, you're also missing the crypto clocks for UFS, which brings
> the count to
> 12 total clocks for MT8195.
> 
> Please, look at my old submission, which actually fixes the
> compatibles other than
> adding the right clocks for all UFS controllers in MediaTek
> platforms.
> 
> https://lore.kernel.org/all/20240612074309.50278-1-angelogioacchino.delregno@collabora.com/
> 
> I want to take the occasion to remind everyone that my fixes were
> discarded because
> the MediaTek UFS driver maintainer wants to keep the low quality of
> the driver in
> favor of easier downstream porting - which is *not* in any way
> adhering to quality
> standards that the Linux community deserves.
> 

Oops, it is sad to hear that.
MediaTek will raise an internal discussion and hope
we could get the more specific requirements back to you soon.

> Cheers,
> Angelo

Re: [PATCH v2 3/4] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes

[AngeloGioacchino Del Regno]

Il 23/07/25 09:33, Macpaul Lin (林智斌) ha scritto:
> On Tue, 2025-07-22 at 11:39 +0200, AngeloGioacchino Del Regno wrote:
>>
>> External email : Please do not click links or open attachments until
>> you have verified the sender or the content.
>>
> 
> [snip...]
> 
>> The unipro mp_bclk really is the ufs-sap clock; besides, the standard
>> has clocks
>> for both TX and RX symbols - and also MT8195 (and also MT6991,
>> MT8196, and others)
>> UFS controller do have both TX and RX symbol clocks.
>>
>> Besides, you're also missing the crypto clocks for UFS, which brings
>> the count to
>> 12 total clocks for MT8195.
>>
>> Please, look at my old submission, which actually fixes the
>> compatibles other than
>> adding the right clocks for all UFS controllers in MediaTek
>> platforms.
>>
>> https://lore.kernel.org/all/20240612074309.50278-1-angelogioacchino.delregno@collabora.com/
>>
>> I want to take the occasion to remind everyone that my fixes were
>> discarded because
>> the MediaTek UFS driver maintainer wants to keep the low quality of
>> the driver in
>> favor of easier downstream porting - which is *not* in any way
>> adhering to quality
>> standards that the Linux community deserves.
>>
> 
> Oops, it is sad to hear that.
> MediaTek will raise an internal discussion and hope
> we could get the more specific requirements back to you soon.
> 

Thanks for that.

Cheers,
Angelo

Re: [PATCH v2 3/4] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes

[Peter Wang (王信友)]

On Tue, 2025-07-22 at 11:39 +0200, AngeloGioacchino Del Regno wrote:
> 
> The unipro mp_bclk really is the ufs-sap clock; besides, the standard
> has clocks
> for both TX and RX symbols - and also MT8195 (and also MT6991,
> MT8196, and others)
> UFS controller do have both TX and RX symbol clocks.
> 
> Besides, you're also missing the crypto clocks for UFS, which brings
> the count to
> 12 total clocks for MT8195.

> Please, look at my old submission, which actually fixes the
> compatibles other than
> adding the right clocks for all UFS controllers in MediaTek
> platforms.
> 
> https://lore.kernel.org/all/20240612074309.50278-1-angelogioacchino.delregno@collabora.com/
> 

Hi Angelo,

The clock architecture may vary depending on the platform.
These clock patch look good to me.


> I want to take the occasion to remind everyone that my fixes were
> discarded because
> the MediaTek UFS driver maintainer wants to keep the low quality of
> the driver in
> favor of easier downstream porting - which is *not* in any way
> adhering to quality
> standards that the Linux community deserves.
> 
> Cheers,
> Angelo

I want to clarify that I am not opposing this in order to keep the 
low quality of the driver for the sake of easier downstream porting.
My objection is purely due to the quality of this patch:
https://lore.kernel.org/all/eb47587159484abca8e6d65dddcf0844822ce99f.camel@mediatek.com/
Originally, this could have been a simple matter handled by a single
DTS setting,
but this patch requires checking a bunch of DTS voltage settings.
This increases the complexity of the boot process, and I don't see any
benefit from it.

Even though I think the other patches look good to me, I haven't seen
any new ones uploaded.
I would like to reiterate that I welcome any upstream contributions
related to Linux UFS on MediaTek platforms.

Thanks
Peter

[PATCH v2 4/4] arm64: dts: mediatek: mt8195: add UFSHCI node

[Macpaul Lin]

From: Rice Lee <ot_riceyj.lee@mediatek.com>

Add a UFS host controller interface (UFSHCI) node to mt8195.dtsi.
Introduce the 'mediatek,ufs-disable-mcq' property to allow disabling
Multiple Circular Queue (MCQ) support.

Signed-off-by: Rice Lee <ot_riceyj.lee@mediatek.com>
Signed-off-by: Eric Lin <ht.lin@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 25 ++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

Changes for v2:
 - No change.

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index dd065b1bf94a..8877953ce292 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1430,6 +1430,31 @@ mmc2: mmc@11250000 {
 			status = "disabled";
 		};
 
+		ufshci: ufshci@11270000 {
+			compatible = "mediatek,mt8195-ufshci";
+			reg = <0 0x11270000 0 0x2300>;
+			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH 0>;
+			phys = <&ufsphy>;
+			clocks = <&infracfg_ao CLK_INFRA_AO_AES_UFSFDE>,
+				 <&infracfg_ao CLK_INFRA_AO_AES>,
+				 <&infracfg_ao CLK_INFRA_AO_UFS_TICK>,
+				 <&infracfg_ao CLK_INFRA_AO_UNIPRO_SYS>,
+				 <&infracfg_ao CLK_INFRA_AO_UNIPRO_TICK>,
+				 <&infracfg_ao CLK_INFRA_AO_UFS_MP_SAP_B>,
+				 <&infracfg_ao CLK_INFRA_AO_UFS_TX_SYMBOL>,
+				 <&infracfg_ao CLK_INFRA_AO_PERI_UFS_MEM_SUB>;
+			clock-names = "ufs", "ufs_aes", "ufs_tick",
+					"unipro_sysclk", "unipro_tick",
+					"unipro_mp_bclk", "ufs_tx_symbol",
+					"ufs_mem_sub";
+			freq-table-hz = <0 0>, <0 0>, <0 0>,
+					<0 0>, <0 0>, <0 0>,
+					<0 0>, <0 0>;
+
+			mediatek,ufs-disable-mcq;
+			status = "disabled";
+		};
+
 		lvts_mcu: thermal-sensor@11278000 {
 			compatible = "mediatek,mt8195-lvts-mcu";
 			reg = <0 0x11278000 0 0x1000>;
-- 
2.45.2

Re: [PATCH v2 4/4] arm64: dts: mediatek: mt8195: add UFSHCI node

[Peter Wang (王信友)]

On Tue, 2025-07-22 at 16:57 +0800, Macpaul Lin wrote:
> From: Rice Lee <ot_riceyj.lee@mediatek.com>
> 
> Add a UFS host controller interface (UFSHCI) node to mt8195.dtsi.
> Introduce the 'mediatek,ufs-disable-mcq' property to allow disabling
> Multiple Circular Queue (MCQ) support.
> 
> Signed-off-by: Rice Lee <ot_riceyj.lee@mediatek.com>
> Signed-off-by: Eric Lin <ht.lin@mediatek.com>
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 25
> ++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> Changes for v2:
>  - No change.
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index dd065b1bf94a..8877953ce292 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1430,6 +1430,31 @@ mmc2: mmc@11250000 {
>  			status = "disabled";
>  		};
>  
> +		ufshci: ufshci@11270000 {
> +			compatible = "mediatek,mt8195-ufshci";
> +			reg = <0 0x11270000 0 0x2300>;
> +			interrupts = <GIC_SPI 137
> IRQ_TYPE_LEVEL_HIGH 0>;
> +			phys = <&ufsphy>;
> +			clocks = <&infracfg_ao
> CLK_INFRA_AO_AES_UFSFDE>,
> +				 <&infracfg_ao CLK_INFRA_AO_AES>,
> +				 <&infracfg_ao
> CLK_INFRA_AO_UFS_TICK>,
> +				 <&infracfg_ao
> CLK_INFRA_AO_UNIPRO_SYS>,
> +				 <&infracfg_ao
> CLK_INFRA_AO_UNIPRO_TICK>,
> +				 <&infracfg_ao
> CLK_INFRA_AO_UFS_MP_SAP_B>,
> +				 <&infracfg_ao
> CLK_INFRA_AO_UFS_TX_SYMBOL>,
> +				 <&infracfg_ao
> CLK_INFRA_AO_PERI_UFS_MEM_SUB>;
> +			clock-names = "ufs", "ufs_aes", "ufs_tick",
> +					"unipro_sysclk",
> "unipro_tick",
> +					"unipro_mp_bclk",
> "ufs_tx_symbol",
> +					"ufs_mem_sub";
> +			freq-table-hz = <0 0>, <0 0>, <0 0>,
> +					<0 0>, <0 0>, <0 0>,
> +					<0 0>, <0 0>;
> +
> +			mediatek,ufs-disable-mcq;
> +			status = "disabled";
> +		};
> +
>  		lvts_mcu: thermal-sensor@11278000 {
>  			compatible = "mediatek,mt8195-lvts-mcu";
>  			reg = <0 0x11278000 0 0x1000>;


Reviewed-by: Peter Wang <peter.wang@mediatek.com>

Re: [PATCH v2 1/4] scsi: ufs: ufs-mediatek: Add UFS host support for MT8195 SoC

[Peter Wang (王信友)]

On Tue, 2025-07-22 at 16:57 +0800, Macpaul Lin wrote:
> Add "mediatek,mt8195-ufshci" to the of_device_id table to enable
> support for MediaTek MT8195/MT8395 UFS host controller. This matches
> the
> device node entry in the MT8195/MT8395 device tree and allows proper
> driver
> binding.
> 
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>  drivers/ufs/host/ufs-mediatek.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> Changes vor f2:
>  - No change.
> 
> diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-
> mediatek.c
> index 182f58d0c9db..e1dbf0231c5e 100644
> --- a/drivers/ufs/host/ufs-mediatek.c
> +++ b/drivers/ufs/host/ufs-mediatek.c
> @@ -50,6 +50,7 @@ static const struct ufs_dev_quirk
> ufs_mtk_dev_fixups[] = {
>  
>  static const struct of_device_id ufs_mtk_of_match[] = {
>  	{ .compatible = "mediatek,mt8183-ufshci" },
> +	{ .compatible = "mediatek,mt8195-ufshci" },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);

Reviewed-by: Peter Wang <peter.wang@mediatek.com>

Re: [PATCH v2 1/4] scsi: ufs: ufs-mediatek: Add UFS host support for MT8195 SoC

[Martin K. Petersen]

On Tue, 22 Jul 2025 16:57:17 +0800, Macpaul Lin wrote:

> Add "mediatek,mt8195-ufshci" to the of_device_id table to enable
> support for MediaTek MT8195/MT8395 UFS host controller. This matches the
> device node entry in the MT8195/MT8395 device tree and allows proper driver
> binding.
> 
> 

Applied to 6.17/scsi-queue, thanks!

[1/4] scsi: ufs: ufs-mediatek: Add UFS host support for MT8195 SoC
      https://git.kernel.org/mkp/scsi/c/6f1fd3e0279f
[2/4] dt-bindings: ufs: mediatek,ufs: add ufs-disable-mcq flag for UFS host
      https://git.kernel.org/mkp/scsi/c/794ff7a0a6e7
[3/4] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes
      https://git.kernel.org/mkp/scsi/c/d01cfeac89e9
[4/4] arm64: dts: mediatek: mt8195: add UFSHCI node
      https://git.kernel.org/mkp/scsi/c/a28f98103890

-- 
Martin K. Petersen	Oracle Linux Engineering