* [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes
@ 2006-01-27 22:02 Zach Brown
2006-01-27 22:02 ` [PATCH 2/2] [x86] " Zach Brown
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Zach Brown @ 2006-01-27 22:02 UTC (permalink / raw)
To: Andi Kleen, linux-kernel, Sam Ravnborg
[x86-64] align per-cpu section to configured cache bytes
Align the start of the per-cpu section to the configured number of bytes in a
cache line. This stops a BUG_ON() from triggering in load_module() when
DEFINE_PER_CPU() is used in a module and the section isn't cacheline-aligned.
Rusty also found this and sent a patch in a while ago
(http://lkml.org/lkml/2004/10/19/17), I don't know what came of that.
Signed-off-by: Zach Brown <zach.brown@oracle.com>
---
arch/x86_64/kernel/vmlinux.lds.S | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: 2.6.16-rc1-mm3-per-cpu-alignment/arch/x86_64/kernel/vmlinux.lds.S
===================================================================
--- 2.6.16-rc1-mm3-per-cpu-alignment.orig/arch/x86_64/kernel/vmlinux.lds.S 2006-01-27 10:19:49.000000000 -0800
+++ 2.6.16-rc1-mm3-per-cpu-alignment/arch/x86_64/kernel/vmlinux.lds.S 2006-01-27 11:41:36.000000000 -0800
@@ -173,7 +173,7 @@
__initramfs_start = .;
.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { *(.init.ramfs) }
__initramfs_end = .;
- . = ALIGN(32);
+ . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
__per_cpu_start = .;
.data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { *(.data.percpu) }
__per_cpu_end = .;
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 2/2] [x86] align per-cpu section to configured cache bytes
2006-01-27 22:02 [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes Zach Brown
@ 2006-01-27 22:02 ` Zach Brown
2006-01-28 21:26 ` Sam Ravnborg
2006-01-27 23:32 ` [PATCH 1/2] [x86-64] " Sam Ravnborg
2006-01-28 3:03 ` Andi Kleen
2 siblings, 1 reply; 6+ messages in thread
From: Zach Brown @ 2006-01-27 22:02 UTC (permalink / raw)
To: Sam Ravnborg, Andi Kleen, linux-kernel
[x86] align per-cpu section to configured cache bytes
This matches the fix for a bug seen on x86-64. Test booted on old hardware
that had 32 byte cachelines to begin with.
Signed-off-by: Zach Brown <zach.brown@oracle.com>
---
arch/i386/kernel/vmlinux.lds.S | 3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: 2.6.16-rc1-per-cpu-align/arch/i386/kernel/vmlinux.lds.S
===================================================================
--- 2.6.16-rc1-per-cpu-align.orig/arch/i386/kernel/vmlinux.lds.S 2006-01-27 13:21:34.000000000 -0800
+++ 2.6.16-rc1-per-cpu-align/arch/i386/kernel/vmlinux.lds.S 2006-01-27 13:32:55.000000000 -0800
@@ -7,6 +7,7 @@
#include <asm-generic/vmlinux.lds.h>
#include <asm/thread_info.h>
#include <asm/page.h>
+#include <asm/cache.h>
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
@@ -115,7 +116,7 @@
__initramfs_start = .;
.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { *(.init.ramfs) }
__initramfs_end = .;
- . = ALIGN(32);
+ . = ALIGN(L1_CACHE_BYTES);
__per_cpu_start = .;
.data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { *(.data.percpu) }
__per_cpu_end = .;
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 2/2] [x86] align per-cpu section to configured cache bytes
2006-01-27 22:02 ` [PATCH 2/2] [x86] " Zach Brown
@ 2006-01-28 21:26 ` Sam Ravnborg
0 siblings, 0 replies; 6+ messages in thread
From: Sam Ravnborg @ 2006-01-28 21:26 UTC (permalink / raw)
To: Zach Brown; +Cc: Andi Kleen, linux-kernel
On Fri, Jan 27, 2006 at 02:02:47PM -0800, Zach Brown wrote:
> [x86] align per-cpu section to configured cache bytes
>
> This matches the fix for a bug seen on x86-64. Test booted on old hardware
> that had 32 byte cachelines to begin with.
>
> Signed-off-by: Zach Brown <zach.brown@oracle.com>
I've applied this verbatim.
The asm-generic part suggested in other mail was not straightforward due
to subtle differences and I have not yet my cross compile environment
running on this box.
Sam
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes
2006-01-27 22:02 [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes Zach Brown
2006-01-27 22:02 ` [PATCH 2/2] [x86] " Zach Brown
@ 2006-01-27 23:32 ` Sam Ravnborg
2006-01-27 23:45 ` Zach Brown
2006-01-28 3:03 ` Andi Kleen
2 siblings, 1 reply; 6+ messages in thread
From: Sam Ravnborg @ 2006-01-27 23:32 UTC (permalink / raw)
To: Zach Brown; +Cc: Andi Kleen, linux-kernel
On Fri, Jan 27, 2006 at 02:02:42PM -0800, Zach Brown wrote:
> - . = ALIGN(32);
> + . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
Grepping other arch's than just x86 and x86_64 it looks like a common
thing.
Is this fix really only relevant for x86 + x86_64 or should it be done
for all arch's?
If we do it for all archs we may as well create:
#define PERCPU(aling) ...
macro in asm-generic/vmlinux.lds.h
Sam
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes
2006-01-27 23:32 ` [PATCH 1/2] [x86-64] " Sam Ravnborg
@ 2006-01-27 23:45 ` Zach Brown
0 siblings, 0 replies; 6+ messages in thread
From: Zach Brown @ 2006-01-27 23:45 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: Andi Kleen, linux-kernel
Sam Ravnborg wrote:
> On Fri, Jan 27, 2006 at 02:02:42PM -0800, Zach Brown wrote:
>
>>- . = ALIGN(32);
>>+ . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
>
>
> Grepping other arch's than just x86 and x86_64 it looks like a common
> thing.
> Is this fix really only relevant for x86 + x86_64 or should it be done
> for all arch's?
I think it'd be needed if other archs had situations where C's
(load_module()'s, in particular) notion of the cacheline size differed
from vmlinux.lds.S's. I didn't want to go screwing around with archs
that I couldn't immediately test :)
> If we do it for all archs we may as well create:
> #define PERCPU(aling) ...
> macro in asm-generic/vmlinux.lds.h
Sounds reasonable to me, should I leave that in your capable hands?
- z
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes
2006-01-27 22:02 [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes Zach Brown
2006-01-27 22:02 ` [PATCH 2/2] [x86] " Zach Brown
2006-01-27 23:32 ` [PATCH 1/2] [x86-64] " Sam Ravnborg
@ 2006-01-28 3:03 ` Andi Kleen
2 siblings, 0 replies; 6+ messages in thread
From: Andi Kleen @ 2006-01-28 3:03 UTC (permalink / raw)
To: Zach Brown; +Cc: linux-kernel, Sam Ravnborg
On Friday 27 January 2006 23:02, Zach Brown wrote:
> [x86-64] align per-cpu section to configured cache bytes
>
> Align the start of the per-cpu section to the configured number of bytes in a
> cache line. This stops a BUG_ON() from triggering in load_module() when
> DEFINE_PER_CPU() is used in a module and the section isn't cacheline-aligned.
> Rusty also found this and sent a patch in a while ago
> (http://lkml.org/lkml/2004/10/19/17), I don't know what came of that.
Added.
-Andi
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2006-01-28 21:26 UTC | newest]
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2006-01-27 22:02 [PATCH 1/2] [x86-64] align per-cpu section to configured cache bytes Zach Brown
2006-01-27 22:02 ` [PATCH 2/2] [x86] " Zach Brown
2006-01-28 21:26 ` Sam Ravnborg
2006-01-27 23:32 ` [PATCH 1/2] [x86-64] " Sam Ravnborg
2006-01-27 23:45 ` Zach Brown
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