From: Bill Davidsen <davidsen@tmr.com>
To: Jan Engelhardt <jengelh@linux01.gwdg.de>
Cc: linux-kernel@vger.kernel.org
Subject: Re: www.softpanorama.org: sparc_vs_x86 fun
Date: Tue, 09 May 2006 10:39:28 -0400 [thread overview]
Message-ID: <4460A9A0.5090404@tmr.com> (raw)
In-Reply-To: <Pine.LNX.4.61.0605041322070.24957@yvahk01.tjqt.qr>
Jan Engelhardt wrote:
> while on SPARC, it takes 6 instructions (of course, being RISC makes it
> execute differently than x64)
>
> sethi %g1, $some_upper_bits
> or %g1, $next_bitgroup
> (shift-left)
> or %g1, $next_bitgroup
> (shift-left)
> or %g1, $last_bitgroup
>
> BTW, T1 is cool, but that the 1U version only has space for 1 disk is
> pretty limiting :/
I have to believe that you can load 64 bit constant data from memory and
don't have to do all this dancing with immediate loads. Therefore this
must be faster or they wouldn't do it this way. Or is this a point that
some unoptimized compiler could generate this code?
--
-bill davidsen (davidsen@tmr.com)
"The secret to procrastination is to put things off until the
last possible moment - but no longer" -me
next prev parent reply other threads:[~2006-05-09 14:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-04 9:24 www.softpanorama.org: sparc_vs_x86 fun Denis Vlasenko
2006-05-04 10:56 ` jimmy
2006-05-04 11:41 ` Dagfinn Ilmari Mannsåker
2006-05-04 18:59 ` Dmitry Torokhov
2006-05-04 11:31 ` Jan Engelhardt
2006-05-04 22:51 ` David S. Miller
2006-05-09 14:39 ` Bill Davidsen [this message]
2006-05-12 15:18 ` Jan Engelhardt
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