Re: [PATCH net 2/3] net: dsa: b53: fix configuring RGMII delay on bcm63xx

Jonas Gorski
2025-05-19T21:43:36Z

On Mon, May 19, 2025 at 10:34 PM Andrew Lunn <andrew@lunn.ch> wrote:
>
> > > These changes look wrong. There is more background here:
> > >
> > > https://elixir.bootlin.com/linux/v6.15-rc7/source/Documentation/devicetree/bindings/net/ethernet-controller.yaml#L287
> >
> > This is what makes it work for me (I tested all four modes, rgmii,
> > rgmii-id, rgmii-txid and rgmii-rxid).
>
> So you have rgmii-id which works, and the rest are broken?

I have four rgmii ports with PHYs, I configured each one to a
different mode (rgmii, rgmii-txid, rgmii-rxid, rgmii-id).

Without this change no mode/port works, since there is always either a
0 ns delay or a 4 ns delay in the rx/tx paths (I assume, I have no
equipment to measure).

With this change all modes/ports work. With "rgmii-id" the mac doesn't
configure any delays (and the phy does instead), with "rgmii" it's
vice versa, so there is always the expected 2 ns delay. Same for rxid
and txid.

Though on testing again RGMII_CTRL_TIMING_SEL doesn't seem to be needed.

> > E.g. with a phy-mode of "rgmii-id", both b53 and the PHY driver would
> > enable rx and tx delays, causing the delays to be 4 ns instead of 2
> > ns. So I don't see how this could have ever worked.
>
> In this situation, the switch port is playing the role of MAC. Hence i
> would stick to what is suggested in ethernet-controller.yaml. The MAC
> does not add any delays, and leaves it to the PHY.
> phylink_fwnode_phy_connect() gets the phy-mode from the DT blob, and
> passes it to phylib when it calls phy_attach_direct().
>
> There is a second use case for DSA, when the port is connected to the
> host, i.e. the port is a CPU port. In that setup, the port is playing
> the PHY side of the RGMII connection, with the host conduit interface
> being the MAC. In that setup, the above recommendations is that the
> conduit interface does not add delays, with the expectation the 'PHY'
> adds the delays. Then the DSA port does need to add delays. So you
> might want to use dsa_is_cpu_port() to decide if to add delays or not.

The Switch is always integrated into the host SoC, so there is no
(r)gmii cpu port to configure. There's basically directly attached DMA
to/from the buffers of the cpu port. Not sure if there are even
buffers, or if it is a direct to DMA delivery.

Best Regards,
Jonas