[PATCH] PCI: fix MMIO addressing collisions

[Patrick Jefferson <patrick.jefferson@hp.com>]

Hello,

Clearing PCI Command bits fixes machine halts observed during sizing 
seqences using MMIO cycles. Clearing the bits is suggested by an 
implementation note in the PCI spec.

Thanks,
Patrick

Signed-off-by: Patrick Jefferson <patrick.jefferson@hp.com>

  --- a/drivers/pci/probe.c
  +++ b/drivers/pci/probe.c
  @@ -147,7 +147,7 @@ static u32 pci_size(u32 base, u32 maxbas
   static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, 
int rom)
   {
          unsigned int pos, reg, next;
  -       u32 l, sz;
  +       u32 l, sz, cmd;
          struct resource *res;

          for(pos=0; pos<howmany; pos = next) {
  @@ -155,10 +155,14 @@ static void pci_read_bases(struct pci_de
                  res = &dev->resource[pos];
                  res->name = pci_name(dev);
                  reg = PCI_BASE_ADDRESS_0 + (pos << 2);
  +               /* disable Memory & I/O decoders before sizing a BAR */
  +               pci_read_config_dword(dev, PCI_COMMAND, &cmd);
  +               pci_write_config_dword(dev, PCI_COMMAND, cmd & 
~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
                  pci_read_config_dword(dev, reg, &l);
                  pci_write_config_dword(dev, reg, ~0);
                  pci_read_config_dword(dev, reg, &sz);
                  pci_write_config_dword(dev, reg, l);
  +               pci_write_config_dword(dev, PCI_COMMAND, cmd);
                  if (!sz || sz == 0xffffffff)
                          continue;
                  if (l == 0xffffffff)