From: Brice Goglin <brice@myri.com>
To: Dave Olson <olson@unixfolk.com>
Cc: linux-pci@atrey.karlin.mff.cuni.cz, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/6] Blacklist PCI-E chipsets depending on Hypertransport MSI capabality
Date: Thu, 22 Jun 2006 09:25:29 -0400 [thread overview]
Message-ID: <449A9A49.4090107@myri.com> (raw)
In-Reply-To: <Pine.LNX.4.61.0606212352480.32220@osa.unixfolk.com>
Dave Olson wrote:
> On Wed, 21 Jun 2006, Brice Goglin wrote:
>
> | [PATCH 3/6] Blacklist PCI-E chipsets depending on Hypertransport MSI capabality
> |
> | Introduce msi_ht_cap_enabled() to check the MSI capability in the
> | Hypertransport configuration space.
> | It is used in a generic quirk quirk_msi_ht_cap() to check whether
> | MSI is enabled on hypertransport chipset, and a nVidia specific quirk
> | quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to
> | be checked.
> | Both quirks set the PCI_BUS_FLAGS_NO_MSI flags when MSI is disabled.
> ...
> | Index: linux-mm/drivers/pci/quirks.c
>
> | +/* Returns 1 if the HT MSI capability is found and enabled */
> | +static pci_bus_flags_t __devinit msi_ht_cap_enabled(struct pci_dev *dev)
> | +{
> | +
> | + /* go through all caps looking for a hypertransport msi mapping */
> | + while (pci_read_config_byte(dev, cap_off + 1, &cap_off) == 0 &&
>
> Perhaps this could be modified to use pci_find_capability() and pci_find_next_capability(),
> rather than writing your own code to do it?
>
Right, pci_find_next_capability() should help here. I am rewriting the
patch.
thanks,
Brice
next prev parent reply other threads:[~2006-06-22 13:25 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <fa.P1G6z6CZQKxLrmseicFSuE3LBWc@ifi.uio.no>
[not found] ` <fa.MhIWHiMWLnkJKB6OhkoEpGfTlNM@ifi.uio.no>
2006-06-22 6:55 ` [PATCH 3/6] Blacklist PCI-E chipsets depending on Hypertransport MSI capabality Dave Olson
2006-06-22 13:25 ` Brice Goglin [this message]
2006-06-21 2:31 [PATCH 0/6] Improve MSI detection v3 Brice Goglin
2006-06-21 2:32 ` [PATCH 3/6] Blacklist PCI-E chipsets depending on Hypertransport MSI capabality Brice Goglin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=449A9A49.4090107@myri.com \
--to=brice@myri.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@atrey.karlin.mff.cuni.cz \
--cc=olson@unixfolk.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox