From: Steven Price <steven.price@arm.com>
To: Boris Brezillon <boris.brezillon@collabora.com>,
Liviu Dudau <liviu.dudau@arm.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 08/11] drm/panthor: Automatically enable interrupts in panthor_fw_wait_acks()
Date: Thu, 14 May 2026 15:25:07 +0100 [thread overview]
Message-ID: <44d8b158-76bd-4ad5-9fd5-616afd432155@arm.com> (raw)
In-Reply-To: <20260512-panthor-signal-from-irq-v2-8-95c614a739cb@collabora.com>
On 12/05/2026 12:37, Boris Brezillon wrote:
> Rather than assuming an interrupt is always expected for request
> acks, temporarily enable the relevant interrupts when the polling-wait
> failed. This should hopefully reduce the number of interrupts the CPU
> has to process.
>
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
As mentioned in the other thread[1] it turns out this won't work with
the current firmware.
The firmware checks the interrupt mask before signalling the ACK - so
enabling the bit in the mask just before waiting for it is problematic -
the firmware may not see the addition in the mask and will not trigger
the interrupt.
In practice this will mostly work - the CPU is fast enough that it's
unlikely the firmware will have picked up the request by the time we
become blocked (and hence the firmware's mask read will be after the
host is already in the wait_event_timeout()). But it's not robust.
I'm hoping to get at least a clarification in the spec if not a change
in (later) firmware.
Thanks,
Steve
[1]
https://lore.kernel.org/all/3c721f22-d1a7-474e-8276-f0afc7cd9a0b@arm.com/
> ---
> drivers/gpu/drm/panthor/panthor_fw.c | 34 +++++++++++++++++++--------------
> drivers/gpu/drm/panthor/panthor_sched.c | 5 +++--
> 2 files changed, 23 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
> index 8239a6951569..f5e0ceca4130 100644
> --- a/drivers/gpu/drm/panthor/panthor_fw.c
> +++ b/drivers/gpu/drm/panthor/panthor_fw.c
> @@ -1039,16 +1039,10 @@ static void panthor_fw_init_global_iface(struct panthor_device *ptdev)
> glb_iface->input->progress_timer = PROGRESS_TIMEOUT_CYCLES >> PROGRESS_TIMEOUT_SCALE_SHIFT;
> glb_iface->input->idle_timer = panthor_fw_conv_timeout(ptdev, IDLE_HYSTERESIS_US);
>
> - /* Enable interrupts we care about. */
> - glb_iface->input->ack_irq_mask = GLB_CFG_ALLOC_EN |
> - GLB_PING |
> - GLB_CFG_PROGRESS_TIMER |
> - GLB_CFG_POWEROFF_TIMER |
> - GLB_IDLE_EN |
> - GLB_IDLE;
> -
> - if (panthor_fw_has_glb_state(ptdev))
> - glb_iface->input->ack_irq_mask |= GLB_STATE_MASK;
> + /* Enable interrupts for asynchronous events that are not
> + * triggered by request acks.
> + */
> + glb_iface->input->ack_irq_mask = GLB_IDLE;
>
> panthor_fw_update_reqs(glb_iface, req, GLB_IDLE_EN | GLB_COUNTER_EN,
> GLB_IDLE_EN | GLB_COUNTER_EN);
> @@ -1318,8 +1312,8 @@ void panthor_fw_unplug(struct panthor_device *ptdev)
> * Return: 0 on success, -ETIMEDOUT otherwise.
> */
> static int panthor_fw_wait_acks(const u32 *req_ptr, const u32 *ack_ptr,
> - wait_queue_head_t *wq,
> - u32 req_mask, u32 *acked,
> + u32 *ack_irq_mask_ptr, spinlock_t *lock,
> + wait_queue_head_t *wq, u32 req_mask, u32 *acked,
> u32 timeout_ms)
> {
> u32 ack, req = READ_ONCE(*req_ptr) & req_mask;
> @@ -1334,8 +1328,16 @@ static int panthor_fw_wait_acks(const u32 *req_ptr, const u32 *ack_ptr,
> if (!ret)
> return 0;
>
> - if (wait_event_timeout(*wq, (READ_ONCE(*ack_ptr) & req_mask) == req,
> - msecs_to_jiffies(timeout_ms)))
> + scoped_guard(spinlock_irqsave, lock)
> + *ack_irq_mask_ptr |= req_mask;
> +
> + ret = wait_event_timeout(*wq, (READ_ONCE(*ack_ptr) & req_mask) == req,
> + msecs_to_jiffies(timeout_ms));
> +
> + scoped_guard(spinlock_irqsave, lock)
> + *ack_irq_mask_ptr &= ~req_mask;
> +
> + if (ret)
> return 0;
>
> /* Check one last time, in case we were not woken up for some reason. */
> @@ -1369,6 +1371,8 @@ int panthor_fw_glb_wait_acks(struct panthor_device *ptdev,
>
> return panthor_fw_wait_acks(&glb_iface->input->req,
> &glb_iface->output->ack,
> + &glb_iface->input->ack_irq_mask,
> + &glb_iface->lock,
> &ptdev->fw->req_waitqueue,
> req_mask, acked, timeout_ms);
> }
> @@ -1395,6 +1399,8 @@ int panthor_fw_csg_wait_acks(struct panthor_device *ptdev, u32 csg_slot,
>
> ret = panthor_fw_wait_acks(&csg_iface->input->req,
> &csg_iface->output->ack,
> + &csg_iface->input->ack_irq_mask,
> + &csg_iface->lock,
> &ptdev->fw->req_waitqueue,
> req_mask, acked, timeout_ms);
>
> diff --git a/drivers/gpu/drm/panthor/panthor_sched.c b/drivers/gpu/drm/panthor/panthor_sched.c
> index 6c5ba747ae45..a9124bcc7de6 100644
> --- a/drivers/gpu/drm/panthor/panthor_sched.c
> +++ b/drivers/gpu/drm/panthor/panthor_sched.c
> @@ -1110,7 +1110,7 @@ cs_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 cs_id)
> cs_iface->input->ringbuf_output = queue->iface.output_fw_va;
> cs_iface->input->config = CS_CONFIG_PRIORITY(queue->priority) |
> CS_CONFIG_DOORBELL(queue->doorbell_id);
> - cs_iface->input->ack_irq_mask = ~0;
> + cs_iface->input->ack_irq_mask = CS_FATAL | CS_FAULT | CS_TILER_OOM;
> panthor_fw_update_reqs(cs_iface, req,
> CS_IDLE_SYNC_WAIT |
> CS_IDLE_EMPTY |
> @@ -1378,7 +1378,8 @@ csg_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 priority)
> csg_iface->input->protm_suspend_buf = 0;
> }
>
> - csg_iface->input->ack_irq_mask = ~0;
> + csg_iface->input->ack_irq_mask = CSG_SYNC_UPDATE | CSG_IDLE |
> + CSG_PROGRESS_TIMER_EVENT;
> panthor_fw_toggle_reqs(csg_iface, doorbell_req, doorbell_ack, queue_mask);
> return 0;
> }
>
next prev parent reply other threads:[~2026-05-14 14:25 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 11:37 [PATCH v2 00/11] drm/panthor: Reduce dma_fence signalling latency Boris Brezillon
2026-05-12 11:37 ` [PATCH v2 01/11] drm/panthor: Make panthor_irq::state a non-atomic field Boris Brezillon
2026-05-12 18:40 ` Chia-I Wu
2026-05-12 11:37 ` [PATCH v2 02/11] drm/panthor: Move the register accessors before the IRQ helpers Boris Brezillon
2026-05-12 18:41 ` Chia-I Wu
2026-05-12 11:37 ` [PATCH v2 03/11] drm/panthor: Replace the panthor_irq macro machinery by inline helpers Boris Brezillon
2026-05-12 18:58 ` Chia-I Wu
2026-05-13 8:03 ` Boris Brezillon
2026-05-13 16:46 ` Chia-I Wu
2026-05-12 11:37 ` [PATCH v2 04/11] drm/panthor: Extend the IRQ logic to allow fast/hard IRQ handlers Boris Brezillon
2026-05-12 19:11 ` Chia-I Wu
2026-05-13 8:09 ` Boris Brezillon
2026-05-13 17:06 ` Chia-I Wu
2026-05-13 17:30 ` Boris Brezillon
2026-05-13 18:17 ` Chia-I Wu
2026-05-12 11:37 ` [PATCH v2 05/11] drm/panthor: Make panthor_fw_{update,toggle}_reqs() callable from IRQ context Boris Brezillon
2026-05-12 19:29 ` Chia-I Wu
2026-05-12 11:37 ` [PATCH v2 06/11] drm/panthor: Prepare the scheduler logic for FW events in " Boris Brezillon
2026-05-12 21:04 ` Chia-I Wu
2026-05-13 8:29 ` Boris Brezillon
2026-05-13 17:47 ` Chia-I Wu
2026-05-12 11:37 ` [PATCH v2 07/11] drm/panthor: Automate CSG IRQ processing at group unbind time Boris Brezillon
2026-05-12 21:16 ` Chia-I Wu
2026-05-14 14:17 ` Steven Price
2026-05-12 11:37 ` [PATCH v2 08/11] drm/panthor: Automatically enable interrupts in panthor_fw_wait_acks() Boris Brezillon
2026-05-12 21:55 ` Chia-I Wu
2026-05-13 8:42 ` Boris Brezillon
2026-05-13 17:14 ` Chia-I Wu
2026-05-14 14:25 ` Steven Price [this message]
2026-05-12 11:37 ` [PATCH v2 09/11] drm/panthor: Process FW events in IRQ context Boris Brezillon
2026-05-12 22:05 ` Chia-I Wu
2026-05-12 22:09 ` Chia-I Wu
2026-05-13 8:44 ` Boris Brezillon
2026-05-14 15:23 ` Steven Price
2026-05-12 11:37 ` [PATCH v2 10/11] drm/panthor: Use the irqsave variant of spin_lock in panthor_gpu_irq_handler() Boris Brezillon
2026-05-14 15:26 ` Steven Price
2026-05-12 11:37 ` [PATCH v2 11/11] drm/panthor: Process GPU events in IRQ context Boris Brezillon
2026-05-12 11:50 ` Boris Brezillon
2026-05-12 22:40 ` Chia-I Wu
2026-05-13 8:54 ` Boris Brezillon
2026-05-13 18:07 ` Chia-I Wu
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