Re: [PATCH v2 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

Zain
2015-11-06T09:52:11Z

Hi

On 2015年11月06日 09:54, Caesar Wang wrote:
> I guess the subject:
> "crypto: rockchip: ...."
>
> Maybe better.
ok! done!
>
> 在 2015年11月06日 09:17, Zain Wang 写道:
>> The names registered are:
>> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
>> You can alloc tags above in your case.
>>
>> And other algorithms and platforms will be added later on.
>>
>> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
>> ---
>>
>> Changed in v2:
>> - remove some part about hash
>> - add weak key detection
>> - changed some variate's type
>>
>> Changde in v1:
>> - modify some variate's name
>> - modify some variate's type
>> - modify some return value
>> - remove or modify some print info
>> - use more dev_xxx in probe
>> - modify the prio of cipher
>
> [...]
>
>> +static int rk_crypto_remove(struct platform_device *pdev)
>> +{
>> + struct crypto_info_t *crypto_tmp = platform_get_drvdata(pdev);
>> +
>> + rk_crypto_unregister();
>> + tasklet_kill(&crypto_tmp->crypto_tasklet);
>> + free_irq(crypto_tmp->irq, crypto_tmp);
>> + crypto_p = NULL;
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id crypto_of_id_table[] = {
>> + { .compatible = "rockchip,rk3288-crypto" },
>> + {}
>> +};
>> +#endif /* CONFIG_OF */
>
> I see the rk3368/ rk32xx SoCs the crypto seem the same IP.
> So,
> I guess we should put the "of_device_id" before the device probe
> since we should can compatible for more SoCs.
>
> Others, for example the commit need a bit change.
ok! done!
>
>> +
>> +static struct platform_driver crypto_driver = {
>> + .probe = rk_crypto_probe,
>> + .remove = rk_crypto_remove,
>> + .driver = {
>> + .name = "rockchip,rk3288-crypto",
>> + .of_match_table = of_match_ptr(crypto_of_id_table),
>> + },
>> +};
>> +
>> +module_platform_driver(crypto_driver);
>> +
>> +MODULE_LICENSE("GPL");
>> +MODULE_AUTHOR("Zain Wang");
>> diff --git a/drivers/crypto/rockchip/rk3288_crypto.h
>> b/drivers/crypto/rockchip/rk3288_crypto.h
>> new file mode 100644
>> index 0000000..cf4cd18
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/rk3288_crypto.h
>> @@ -0,0 +1,222 @@
>> +#ifndef __RK3288_CRYPTO_H__
>> +#define __RK3288_CRYPTO_H__
>> +
>> +#include <crypto/sha.h>
>> +#include <crypto/aes.h>
>> +#include <crypto/des.h>
>> +#include <crypto/ctr.h>
>> +#include <crypto/algapi.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/delay.h>
>> +
>> +#define _SBF(v, f) ((v) << (f))
>> +
>> +/* Crypto control registers*/
>> +#define RK_CRYPTO_INTSTS 0x0000
>> +#define RK_CRYPTO_PKA_DONE_INT BIT(5)
>> +#define RK_CRYPTO_HASH_DONE_INT BIT(4)
>> +#define RK_CRYPTO_HRDMA_ERR_INT BIT(3)
>> +#define RK_CRYPTO_HRDMA_DONE_INT BIT(2)
>> +#define RK_CRYPTO_BCDMA_ERR_INT BIT(1)
>> +#define RK_CRYPTO_BCDMA_DONE_INT BIT(0)
>> +
>> +#define RK_CRYPTO_INTENA 0x0004
>> +#define RK_CRYPTO_PKA_DONE_ENA BIT(5)
>> +#define RK_CRYPTO_HASH_DONE_ENA BIT(4)
>> +#define RK_CRYPTO_HRDMA_ERR_ENA BIT(3)
>> +#define RK_CRYPTO_HRDMA_DONE_ENA BIT(2)
>> +#define RK_CRYPTO_BCDMA_ERR_ENA BIT(1)
>> +#define RK_CRYPTO_BCDMA_DONE_ENA BIT(0)
>> +
>> +#define RK_CRYPTO_CTRL 0x0008
>> +#define RK_CRYPTO_WRITE_MASK (0xFFFF << 16)
>> +#define RK_CRYPTO_TRNG_FLUSH BIT(9)
>> +#define RK_CRYPTO_TRNG_START BIT(8)
>> +#define RK_CRYPTO_PKA_FLUSH BIT(7)
>> +#define RK_CRYPTO_HASH_FLUSH BIT(6)
>> +#define RK_CRYPTO_BLOCK_FLUSH BIT(5)
>> +#define RK_CRYPTO_PKA_START BIT(4)
>> +#define RK_CRYPTO_HASH_START BIT(3)
>> +#define RK_CRYPTO_BLOCK_START BIT(2)
>> +#define RK_CRYPTO_TDES_START BIT(1)
>> +#define RK_CRYPTO_AES_START BIT(0)
>> +
>> +#define RK_CRYPTO_CONF 0x000c
>> +/* HASH Receive DMA Address Mode: fix | increment */
>> +#define RK_CRYPTO_HR_ADDR_MODE BIT(8)
>> +/* Block Transmit DMA Address Mode: fix | increment */
>> +#define RK_CRYPTO_BT_ADDR_MODE BIT(7)
>> +/* Block Receive DMA Address Mode: fix | increment */
>> +#define RK_CRYPTO_BR_ADDR_MODE BIT(6)
>> +#define RK_CRYPTO_BYTESWAP_HRFIFO BIT(5)
>> +#define RK_CRYPTO_BYTESWAP_BTFIFO BIT(4)
>> +#define RK_CRYPTO_BYTESWAP_BRFIFO BIT(3)
>> +/* AES = 0 OR DES = 1 */
>> +#define RK_CRYPTO_DESSEL BIT(2)
>> +#define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE _SBF(0x00, 0)
>> +#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT _SBF(0x01, 0)
>> +#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT _SBF(0x02, 0)
>> +
>> +/* Block Receiving DMA Start Address Register */
>> +#define RK_CRYPTO_BRDMAS 0x0010
>> +/* Block Transmitting DMA Start Address Register */
>> +#define RK_CRYPTO_BTDMAS 0x0014
>> +/* Block Receiving DMA Length Register */
>> +#define RK_CRYPTO_BRDMAL 0x0018
>> +/* Hash Receiving DMA Start Address Register */
>> +#define RK_CRYPTO_HRDMAS 0x001c
>> +/* Hash Receiving DMA Length Register */
>> +#define RK_CRYPTO_HRDMAL 0x0020
>> +
>> +/* AES registers */
>> +#define RK_CRYPTO_AES_CTRL 0x0080
>> +#define RK_CRYPTO_AES_BYTESWAP_CNT BIT(11)
>> +#define RK_CRYPTO_AES_BYTESWAP_KEY BIT(10)
>> +#define RK_CRYPTO_AES_BYTESWAP_IV BIT(9)
>> +#define RK_CRYPTO_AES_BYTESWAP_DO BIT(8)
>> +#define RK_CRYPTO_AES_BYTESWAP_DI BIT(7)
>> +#define RK_CRYPTO_AES_KEY_CHANGE BIT(6)
>> +#define RK_CRYPTO_AES_ECB_MODE _SBF(0x00, 4)
>> +#define RK_CRYPTO_AES_CBC_MODE _SBF(0x01, 4)
>> +#define RK_CRYPTO_AES_CTR_MODE _SBF(0x02, 4)
>> +#define RK_CRYPTO_AES_128BIT_key _SBF(0x00, 2)
>> +#define RK_CRYPTO_AES_192BIT_key _SBF(0x01, 2)
>> +#define RK_CRYPTO_AES_256BIT_key _SBF(0x02, 2)
>> +/* Slave = 0 / fifo = 1 */
>> +#define RK_CRYPTO_AES_FIFO_MODE BIT(1)
>> +/* Encryption = 0 , Decryption = 1 */
>> +#define RK_CRYPTO_AES_DEC BIT(0)
>> +
>> +#define RK_CRYPTO_AES_STS 0x0084
>> +#define RK_CRYPTO_AES_DONE BIT(0)
>> +
>> +/* AES Input Data 0-3 Register */
>> +#define RK_CRYPTO_AES_DIN_0 0x0088
>> +#define RK_CRYPTO_AES_DIN_1 0x008c
>> +#define RK_CRYPTO_AES_DIN_2 0x0090
>> +#define RK_CRYPTO_AES_DIN_3 0x0094
>> +
>> +/* AES output Data 0-3 Register */
>> +#define RK_CRYPTO_AES_DOUT_0 0x0098
>> +#define RK_CRYPTO_AES_DOUT_1 0x009c
>> +#define RK_CRYPTO_AES_DOUT_2 0x00a0
>> +#define RK_CRYPTO_AES_DOUT_3 0x00a4
>> +
>> +/* AES IV Data 0-3 Register */
>> +#define RK_CRYPTO_AES_IV_0 0x00a8
>> +#define RK_CRYPTO_AES_IV_1 0x00ac
>> +#define RK_CRYPTO_AES_IV_2 0x00b0
>> +#define RK_CRYPTO_AES_IV_3 0x00b4
>> +
>> +/* AES Key Data 0-3 Register */
>> +#define RK_CRYPTO_AES_KEY_0 0x00b8
>> +#define RK_CRYPTO_AES_KEY_1 0x00bc
>> +#define RK_CRYPTO_AES_KEY_2 0x00c0
>> +#define RK_CRYPTO_AES_KEY_3 0x00c4
>> +#define RK_CRYPTO_AES_KEY_4 0x00c8
>> +#define RK_CRYPTO_AES_KEY_5 0x00cc
>> +#define RK_CRYPTO_AES_KEY_6 0x00d0
>> +#define RK_CRYPTO_AES_KEY_7 0x00d4
>> +
>> +/* AES Input Counter 0-3 Register */
>> +#define RK_CRYPTO_AES_CNT_0 0x00d8
>> +#define RK_CRYPTO_AES_CNT_1 0x00dc
>> +#define RK_CRYPTO_AES_CNT_2 0x00e0
>> +#define RK_CRYPTO_AES_CNT_3 0x00e4
>> +
>> +/* des/tdes */
>> +#define RK_CRYPTO_TDES_CTRL 0x0100
>> +#define RK_CRYPTO_TDES_BYTESWAP_KEY BIT(8)
>> +#define RK_CRYPTO_TDES_BYTESWAP_IV BIT(7)
>> +#define RK_CRYPTO_TDES_BYTESWAP_DO BIT(6)
>> +#define RK_CRYPTO_TDES_BYTESWAP_DI BIT(5)
>> +/* 0: ECB, 1: CBC */
>> +#define RK_CRYPTO_TDES_CHAINMODE BIT(4)
>> +/* TDES Key Mode, 0 : EDE, 1 : EEE */
>> +#define RK_CRYPTO_TDES_EEE BIT(3)
>> +/* 0: DES, 1:TDES */
>> +#define RK_CRYPTO_TDES_SELECT BIT(2)
>> +/* 0: Slave, 1:Fifo */
>> +#define RK_CRYPTO_TDES_FIFO_MODE BIT(1)
>> +/* Encryption = 0 , Decryption = 1 */
>> +#define RK_CRYPTO_TDES_DEC BIT(0)
>> +
>> +#define RK_CRYPTO_TDES_STS 0x0104
>> +#define RK_CRYPTO_TDES_DONE BIT(0)
>> +
>> +#define RK_CRYPTO_TDES_DIN_0 0x0108
>> +#define RK_CRYPTO_TDES_DIN_1 0x010c
>> +#define RK_CRYPTO_TDES_DOUT_0 0x0110
>> +#define RK_CRYPTO_TDES_DOUT_1 0x0114
>> +#define RK_CRYPTO_TDES_IV_0 0x0118
>> +#define RK_CRYPTO_TDES_IV_1 0x011c
>> +#define RK_CRYPTO_TDES_KEY1_0 0x0120
>> +#define RK_CRYPTO_TDES_KEY1_1 0x0124
>> +#define RK_CRYPTO_TDES_KEY2_0 0x0128
>> +#define RK_CRYPTO_TDES_KEY2_1 0x012c
>> +#define RK_CRYPTO_TDES_KEY3_0 0x0130
>> +#define RK_CRYPTO_TDES_KEY3_1 0x0134
>> +
>> +#define CRYPTO_READ(dev, offset) \
>> + readl_relaxed(((dev)->reg + (offset)))
>> +#define CRYPTO_WRITE(dev, offset, val) \
>> + writel_relaxed((val), ((dev)->reg + (offset)))
>> +/* get register virt address */
>> +#define CRYPTO_GET_REG_VIRT(dev, offset) ((dev)->reg + (offset))
>> +
>> +struct crypto_info_t {
>> + struct device *dev;
>> + struct clk *aclk;
>> + struct clk *hclk;
>> + struct clk *sclk;
>> + struct clk *dmaclk;
>> + void __iomem *reg;
>> + int irq;
>> + struct crypto_queue queue;
>> + struct tasklet_struct crypto_tasklet;
>> + struct ablkcipher_request *ablk_req;
>> + /* device lock */
>> + spinlock_t lock;
>> +
>> + /* the public variable */
>> + struct scatterlist *sg_src;
>> + struct scatterlist *sg_dst;
>> + struct scatterlist sg_tmp;
>> + struct scatterlist *first;
>> + unsigned int left_bytes;
>> + void *addr_vir;
>> + int aligned;
>> + int align_size;
>> + size_t nents;
>> + unsigned int total;
>> + unsigned int count;
>> + u32 mode;
>> + dma_addr_t addr_in;
>> + dma_addr_t addr_out;
>> + int (*start)(struct crypto_info_t *dev);
>> + int (*update)(struct crypto_info_t *dev);
>> + void (*complete)(struct crypto_info_t *dev, int err);
>> + int (*enable_clk)(struct crypto_info_t *dev);
>> + void (*disable_clk)(struct crypto_info_t *dev);
>> + int (*load_data)(struct crypto_info_t *dev,
>> + struct scatterlist *sg_src,
>> + struct scatterlist *sg_dst);
>> + void (*unload_data)(struct crypto_info_t *dev);
>> +};
>> +
>> +/* the private variable of cipher */
>> +struct rk_cipher_ctx {
>> + struct crypto_info_t *dev;
>> + unsigned int keylen;
>> +};
>> +
>> +extern struct crypto_info_t *crypto_p;
>> +
>> +extern struct crypto_alg rk_ecb_aes_alg;
>> +extern struct crypto_alg rk_cbc_aes_alg;
>> +extern struct crypto_alg rk_ecb_des_alg;
>> +extern struct crypto_alg rk_cbc_des_alg;
>> +extern struct crypto_alg rk_ecb_des3_ede_alg;
>> +extern struct crypto_alg rk_cbc_des3_ede_alg;
>> +
>> +#endif
>> diff --git a/drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
>> b/drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
>> new file mode 100644
>> index 0000000..28b49c9
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
>> @@ -0,0 +1,511 @@
>> +/*
>> + *Crypto acceleration support for Rockchip RK3288
>> + *
>> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
>> + *
>> + * Author: Zain Wang <zain.wang@rock-chips.com>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> modify it
>> + * under the terms and conditions of the GNU General Public License,
>> + * version 2, as published by the Free Software Foundation.
>> + *
>> + * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
>> + */
>> +#include "rk3288_crypto.h"
>> +
>> +#define RK_CRYPTO_DEC BIT(0)
>> +#define AES 0
>> +#define TDES BIT(16)
>> +
>> +static void rk_crypto_complete(struct crypto_info_t *dev, int err)
>> +{
>> + if (dev->ablk_req->base.complete) {
>> + if (err)
>> + dev_warn(dev->dev, "[%s:%d] err = %d\n",
>> + __func__, __LINE__, err);
>> + dev->ablk_req->base.complete(&dev->ablk_req->base, err);
>> + }
>> +}
>> +
>> +static int rk_handle_req(struct ablkcipher_request *req, int
>> alig_bytes)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> + int err;
>> +
>> + if (!IS_ALIGNED(req->nbytes, alig_bytes))
>> + return -EINVAL;
>> +
>> + spin_lock(&dev->lock);
>> + err = ablkcipher_enqueue_request(&dev->queue, req);
>> + spin_unlock(&dev->lock);
>> + tasklet_schedule(&dev->crypto_tasklet);
>> + return err;
>> +}
>> +
>> +static void rk_ablk_init(struct crypto_info_t *dev,
>> + struct ablkcipher_request *req)
>> +{
>> + dev->left_bytes = req->nbytes;
>> + dev->total = req->nbytes;
>> + dev->sg_src = req->src;
>> + dev->first = req->src;
>> + dev->nents = sg_nents(req->src);
>> + dev->sg_dst = req->dst;
>> + dev->aligned = 1;
>> + dev->ablk_req = req;
>> +}
>> +
>> +static int rk_aes_setkey(struct crypto_ablkcipher *cipher,
>> + const u8 *key, unsigned int keylen)
>> +{
>> + struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
>> + struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
>> +
>> + if (!key) {
>> + dev_err(ctx->dev->dev, "[%s:%d] no key error\n",
>> + __func__, __LINE__);
>> + return -EINVAL;
>> + }
>> +
>> + if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
>> + keylen != AES_KEYSIZE_256) {
>> + crypto_ablkcipher_set_flags(cipher,
>> CRYPTO_TFM_RES_BAD_KEY_LEN);
>> + dev_err(ctx->dev->dev, "[%s:%d] expect key len = %d\n",
>> + __func__, __LINE__, keylen);
>> + return -EINVAL;
>> + }
>> + ctx->keylen = keylen;
>> + memcpy(ctx->dev->reg + RK_CRYPTO_AES_KEY_0, key, keylen);
>> + return 0;
>> +}
>> +
>> +static int rk_tdes_setkey(struct crypto_ablkcipher *cipher,
>> + const u8 *key, unsigned int keylen)
>> +{
>> + struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
>> + struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
>> + u32 tmp[DES_EXPKEY_WORDS];
>> +
>> + if (!key) {
>> + dev_err(ctx->dev->dev, "[%s:%d] no key error\n",
>> + __func__, __LINE__);
>> + return -EINVAL;
>> + }
>> +
>> + if (keylen != DES_KEY_SIZE && keylen != DES3_EDE_KEY_SIZE) {
>> + crypto_ablkcipher_set_flags(cipher,
>> CRYPTO_TFM_RES_BAD_KEY_LEN);
>> + dev_err(ctx->dev->dev, "[%s:%d] expect key len = %d\n",
>> + __func__, __LINE__, keylen);
>> + return -EINVAL;
>> + }
>> +
>> + if (keylen == DES_KEY_SIZE) {
>> + if (!des_ekey(tmp, key) &&
>> + (tfm->crt_flags & CRYPTO_TFM_REQ_WEAK_KEY)) {
>> + tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
>> + return -EINVAL;
>> + }
>> + }
>> +
>> + ctx->keylen = keylen;
>> + memcpy(ctx->dev->reg + RK_CRYPTO_TDES_KEY1_0, key, keylen);
>> + return 0;
>> +}
>> +
>> +static int rk_aes_ecb_encrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_AES_ECB_MODE | AES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_aes_ecb_decrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_AES_ECB_MODE | RK_CRYPTO_DEC | AES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_aes_cbc_encrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_AES_CBC_MODE | AES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_aes_cbc_decrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_AES_CBC_MODE | RK_CRYPTO_DEC | AES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des_ecb_encrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des_ecb_decrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_DEC | TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des_cbc_encrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_TDES_CHAINMODE | TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des_cbc_decrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_TDES_CHAINMODE | RK_CRYPTO_DEC | TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des3_ede_ecb_encrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_TDES_SELECT | TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des3_ede_ecb_decrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_DEC | TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des3_ede_cbc_encrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE |
>> TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static int rk_des3_ede_cbc_decrypt(struct ablkcipher_request *req)
>> +{
>> + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + struct crypto_info_t *dev = ctx->dev;
>> +
>> + dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE |
>> + RK_CRYPTO_DEC | TDES;
>> + rk_ablk_init(dev, req);
>> + return rk_handle_req(req, dev->align_size);
>> +}
>> +
>> +static void rk_ablk_hw_init(struct crypto_info_t *dev)
>> +{
>> + struct crypto_ablkcipher *tfm =
>> crypto_ablkcipher_reqtfm(dev->ablk_req);
>> + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
>> + u32 conf_reg = 0;
>> +
>> + if (dev->mode & TDES) {
>> + dev->mode &= ~TDES;
>> + dev->mode |= RK_CRYPTO_TDES_FIFO_MODE |
>> + RK_CRYPTO_TDES_BYTESWAP_KEY |
>> + RK_CRYPTO_TDES_BYTESWAP_IV;
>> + CRYPTO_WRITE(dev, RK_CRYPTO_TDES_CTRL, dev->mode);
>> +
>> + memcpy(dev->reg + RK_CRYPTO_TDES_IV_0, dev->ablk_req->info, 8);
>> + conf_reg = RK_CRYPTO_DESSEL;
>> + } else {
>> + dev->mode |= RK_CRYPTO_AES_FIFO_MODE |
>> + RK_CRYPTO_AES_KEY_CHANGE |
>> + RK_CRYPTO_AES_BYTESWAP_KEY |
>> + RK_CRYPTO_AES_BYTESWAP_IV;
>> +
>> + if (ctx->keylen == AES_KEYSIZE_192)
>> + dev->mode |= RK_CRYPTO_AES_192BIT_key;
>> + else if (ctx->keylen == AES_KEYSIZE_256)
>> + dev->mode |= RK_CRYPTO_AES_256BIT_key;
>> +
>> + CRYPTO_WRITE(dev, RK_CRYPTO_AES_CTRL, dev->mode);
>> +
>> + memcpy(dev->reg + RK_CRYPTO_AES_IV_0, dev->ablk_req->info, 16);
>> + }
>> + conf_reg |= RK_CRYPTO_BYTESWAP_BTFIFO |
>> + RK_CRYPTO_BYTESWAP_BRFIFO;
>> + CRYPTO_WRITE(dev, RK_CRYPTO_CONF, conf_reg);
>> + CRYPTO_WRITE(dev, RK_CRYPTO_INTENA,
>> + RK_CRYPTO_BCDMA_ERR_ENA | RK_CRYPTO_BCDMA_DONE_ENA);
>> +}
>> +
>> +static void crypto_dma_start(struct crypto_info_t *dev)
>> +{
>> + CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAS, dev->addr_in);
>> + CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAL, dev->count / 4);
>> + CRYPTO_WRITE(dev, RK_CRYPTO_BTDMAS, dev->addr_out);
>> + CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_BLOCK_START |
>> + (RK_CRYPTO_BLOCK_START << 16));
>> +}
>> +
>> +static int rk_set_data_start(struct crypto_info_t *dev)
>> +{
>> + int err;
>> +
>> + err = dev->load_data(dev, dev->sg_src, dev->sg_dst);
>> + if (!err)
>> + crypto_dma_start(dev);
>> + return err;
>> +}
>> +
>> +static int rk_ablk_start(struct crypto_info_t *dev)
>> +{
>> + int err;
>> +
>> + spin_lock(&dev->lock);
>> + rk_ablk_hw_init(dev);
>> + err = rk_set_data_start(dev);
>> + spin_unlock(&dev->lock);
>> + return err;
>> +}
>> +
>> +/* return:
>> + * true some err was occurred
>> + * fault no err, continue
>> + */
>> +static int rk_ablk_rx(struct crypto_info_t *dev)
>> +{
>> + int err = 0;
>> +
>> + dev->unload_data(dev);
>> + if (!dev->aligned) {
>> + if (!sg_pcopy_from_buffer(dev->ablk_req->dst, dev->nents,
>> + dev->addr_vir, dev->count,
>> + dev->total - dev->left_bytes -
>> + dev->count)) {
>> + err = -EINVAL;
>> + goto out_rx;
>> + }
>> + }
>> + if (dev->left_bytes) {
>> + if (dev->aligned) {
>> + if (sg_is_last(dev->sg_src)) {
>> + dev_err(dev->dev, "[%s:%d], lack of data\n",
>> + __func__, __LINE__);
>> + err = -ENOMEM;
>> + goto out_rx;
>> + }
>> + dev->sg_src = sg_next(dev->sg_src);
>> + dev->sg_dst = sg_next(dev->sg_dst);
>> + }
>> + err = rk_set_data_start(dev);
>> + } else {
>> + /* here show the calculation is over without any err */
>> + dev->complete(dev, 0);
>> + }
>> +out_rx:
>> + return err;
>> +}
>> +
>> +static int rk_ablk_cra_init(struct crypto_tfm *tfm)
>> +{
>> + struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
>> +
>> + ctx->dev = crypto_p;
>> + ctx->dev->align_size = crypto_tfm_alg_alignmask(tfm) + 1;
>> + ctx->dev->start = rk_ablk_start;
>> + ctx->dev->update = rk_ablk_rx;
>> + ctx->dev->complete = rk_crypto_complete;
>> + ctx->dev->addr_vir = (char *)__get_free_page(GFP_KERNEL);
>> +
>> + return ctx->dev->addr_vir ? ctx->dev->enable_clk(ctx->dev) :
>> -ENOMEM;
>> +}
>> +
>> +static void rk_ablk_cra_exit(struct crypto_tfm *tfm)
>> +{
>> + struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
>> +
>> + free_page((unsigned long)ctx->dev->addr_vir);
>> + ctx->dev->disable_clk(ctx->dev);
>> +}
>> +
>> +struct crypto_alg rk_ecb_aes_alg = {
>> + .cra_name = "ecb(aes)",
>> + .cra_driver_name = "ecb-aes-rk",
>> + .cra_priority = 300,
>> + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
>> + CRYPTO_ALG_ASYNC,
>> + .cra_blocksize = AES_BLOCK_SIZE,
>> + .cra_ctxsize = sizeof(struct rk_cipher_ctx),
>> + .cra_alignmask = 0x0f,
>> + .cra_type = &crypto_ablkcipher_type,
>> + .cra_module = THIS_MODULE,
>> + .cra_init = rk_ablk_cra_init,
>> + .cra_exit = rk_ablk_cra_exit,
>> + .cra_u.ablkcipher = {
>> + .min_keysize = AES_MIN_KEY_SIZE,
>> + .max_keysize = AES_MAX_KEY_SIZE,
>> + .setkey = rk_aes_setkey,
>> + .encrypt = rk_aes_ecb_encrypt,
>> + .decrypt = rk_aes_ecb_decrypt,
>> + }
>> +};
>> +
>> +struct crypto_alg rk_cbc_aes_alg = {
>> + .cra_name = "cbc(aes)",
>> + .cra_driver_name = "cbc-aes-rk",
>> + .cra_priority = 300,
>> + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
>> + CRYPTO_ALG_ASYNC,
>> + .cra_blocksize = AES_BLOCK_SIZE,
>> + .cra_ctxsize = sizeof(struct rk_cipher_ctx),
>> + .cra_alignmask = 0x0f,
>> + .cra_type = &crypto_ablkcipher_type,
>> + .cra_module = THIS_MODULE,
>> + .cra_init = rk_ablk_cra_init,
>> + .cra_exit = rk_ablk_cra_exit,
>> + .cra_u.ablkcipher = {
>> + .min_keysize = AES_MIN_KEY_SIZE,
>> + .max_keysize = AES_MAX_KEY_SIZE,
>> + .ivsize = AES_BLOCK_SIZE,
>> + .setkey = rk_aes_setkey,
>> + .encrypt = rk_aes_cbc_encrypt,
>> + .decrypt = rk_aes_cbc_decrypt,
>> + }
>> +};
>> +
>> +struct crypto_alg rk_ecb_des_alg = {
>> + .cra_name = "ecb(des)",
>> + .cra_driver_name = "ecb-des-rk",
>> + .cra_priority = 300,
>> + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
>> + CRYPTO_ALG_ASYNC,
>> + .cra_blocksize = DES_BLOCK_SIZE,
>> + .cra_ctxsize = sizeof(struct rk_cipher_ctx),
>> + .cra_alignmask = 0x07,
>> + .cra_type = &crypto_ablkcipher_type,
>> + .cra_module = THIS_MODULE,
>> + .cra_init = rk_ablk_cra_init,
>> + .cra_exit = rk_ablk_cra_exit,
>> + .cra_u.ablkcipher = {
>> + .min_keysize = DES_KEY_SIZE,
>> + .max_keysize = DES_KEY_SIZE,
>> + .setkey = rk_tdes_setkey,
>> + .encrypt = rk_des_ecb_encrypt,
>> + .decrypt = rk_des_ecb_decrypt,
>> + }
>> +};
>> +
>> +struct crypto_alg rk_cbc_des_alg = {
>> + .cra_name = "cbc(des)",
>> + .cra_driver_name = "cbc-des-rk",
>> + .cra_priority = 300,
>> + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
>> + CRYPTO_ALG_ASYNC,
>> + .cra_blocksize = DES_BLOCK_SIZE,
>> + .cra_ctxsize = sizeof(struct rk_cipher_ctx),
>> + .cra_alignmask = 0x07,
>> + .cra_type = &crypto_ablkcipher_type,
>> + .cra_module = THIS_MODULE,
>> + .cra_init = rk_ablk_cra_init,
>> + .cra_exit = rk_ablk_cra_exit,
>> + .cra_u.ablkcipher = {
>> + .min_keysize = DES_KEY_SIZE,
>> + .max_keysize = DES_KEY_SIZE,
>> + .ivsize = DES_BLOCK_SIZE,
>> + .setkey = rk_tdes_setkey,
>> + .encrypt = rk_des_cbc_encrypt,
>> + .decrypt = rk_des_cbc_decrypt,
>> + }
>> +};
>> +
>> +struct crypto_alg rk_ecb_des3_ede_alg = {
>> + .cra_name = "ecb(des3_ede)",
>> + .cra_driver_name = "ecb-des3-ede-rk",
>> + .cra_priority = 300,
>> + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
>> + CRYPTO_ALG_ASYNC,
>> + .cra_blocksize = DES_BLOCK_SIZE,
>> + .cra_ctxsize = sizeof(struct rk_cipher_ctx),
>> + .cra_alignmask = 0x07,
>> + .cra_type = &crypto_ablkcipher_type,
>> + .cra_module = THIS_MODULE,
>> + .cra_init = rk_ablk_cra_init,
>> + .cra_exit = rk_ablk_cra_exit,
>> + .cra_u.ablkcipher = {
>> + .min_keysize = DES3_EDE_KEY_SIZE,
>> + .max_keysize = DES3_EDE_KEY_SIZE,
>> + .ivsize = DES_BLOCK_SIZE,
>> + .setkey = rk_tdes_setkey,
>> + .encrypt = rk_des3_ede_ecb_encrypt,
>> + .decrypt = rk_des3_ede_ecb_decrypt,
>> + }
>> +};
>> +
>> +struct crypto_alg rk_cbc_des3_ede_alg = {
>> + .cra_name = "cbc(des3_ede)",
>> + .cra_driver_name = "cbc-des3-ede-rk",
>> + .cra_priority = 300,
>> + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
>> + CRYPTO_ALG_ASYNC,
>> + .cra_blocksize = DES_BLOCK_SIZE,
>> + .cra_ctxsize = sizeof(struct rk_cipher_ctx),
>> + .cra_alignmask = 0x07,
>> + .cra_type = &crypto_ablkcipher_type,
>> + .cra_module = THIS_MODULE,
>> + .cra_init = rk_ablk_cra_init,
>> + .cra_exit = rk_ablk_cra_exit,
>> + .cra_u.ablkcipher = {
>> + .min_keysize = DES3_EDE_KEY_SIZE,
>> + .max_keysize = DES3_EDE_KEY_SIZE,
>> + .ivsize = DES_BLOCK_SIZE,
>> + .setkey = rk_tdes_setkey,
>> + .encrypt = rk_des3_ede_cbc_encrypt,
>> + .decrypt = rk_des3_ede_cbc_decrypt,
>> + }
>> +};
>
>