Re: [PATCH v3 15/15] PCI/AER: Enable internal errors for CXL upstream and downstream switch ports

["Bowman, Terry" <terry.bowman@amd.com>]

On 11/18/2024 5:54 AM, Lukas Wunner wrote:
> On Wed, Nov 13, 2024 at 03:54:29PM -0600, Terry Bowman wrote:
>> Export the AER service driver's pci_aer_unmask_internal_errors() function
>> to CXL namsespace.
>          ^^^^^^^^^^
> 	 namespace
Yup, thanks.
>> Remove the function's dependency on the CONFIG_PCIEAER_CXL kernel config
>> because it is now an exported function.
> [...]
>> --- a/drivers/pci/pcie/aer.c
>> +++ b/drivers/pci/pcie/aer.c
>> @@ -949,7 +949,6 @@ static bool is_internal_error(struct aer_err_info *info)
>>  	return info->status & PCI_ERR_UNC_INTN;
>>  }
>>  
>> -#ifdef CONFIG_PCIEAER_CXL
>>  /**
>>   * pci_aer_unmask_internal_errors - unmask internal errors
>>   * @dev: pointer to the pcie_dev data structure
>> @@ -960,7 +959,7 @@ static bool is_internal_error(struct aer_err_info *info)
>>   * Note: AER must be enabled and supported by the device which must be
>>   * checked in advance, e.g. with pcie_aer_is_native().
>>   */
>> -static void pci_aer_unmask_internal_errors(struct pci_dev *dev)
>> +void pci_aer_unmask_internal_errors(struct pci_dev *dev)
> Hm, it seems the reason why you're moving pci_aer_unmask_internal_errors()
> outside of "ifdef CONFIG_PCIEAER_CXL" is that drivers/cxl/core/pci.c
> is conditional on CONFIG_CXL_BUS, whereas CONFIG_PCIEAER_CXL depends
> on CONFIG_CXL_PCI.
>
> In other words, you need this to avoid build breakage if CONFIG_CXL_BUS
> is enabled but CONFIG_CXL_PCI is not.
>
> I'm wondering (as a CXL ignoramus) why that can happen in the first
> place, i.e. why is drivers/cxl/core/pci.c compiled at all if
> CONFIG_CXL_PCI is disabled?
>
> Thanks,
>
> Lukas

I moved the function out of the 'ifdef' block because it would be used in
another subsystem. Bjorn requested in earlier review that functions used across
subsystems should not use ifdef.

The drivers/cxl/Makefile file shows CONFIG_CXL_PCI gates cxl_pci.c build with:
obj-$(CONFIG_CXL_PCI) += cxl_pci.o 

BTW, CONFIG_CXL_PCI was added in the commit (68cdd3d2af69) below.

commit 68cdd3d2af6964dae2f8d9b53ee94f740dcbda35
Author: Ben Widawsky <bwidawsk@kernel.org>
Date:   Sun Jan 23 16:28:44 2022 -0800

    cxl: Rename CXL_MEM to CXL_PCI

    The cxl_mem module was renamed cxl_pci in commit 21e9f76733a8 ("cxl:
    Rename mem to pci"). In preparation for adding an ancillary driver for
    cxl_memdev devices (registered on the cxl bus by cxl_pci), go ahead and
    rename CONFIG_CXL_MEM to CONFIG_CXL_PCI. Free up the CXL_MEM name for
    that new driver to manage CXL.mem endpoint operations.

    Suggested-by: Dan Williams <dan.j.williams@intel.com>
    Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
    Link: https://lore.kernel.org/r/164298412409.3018233.12407355692407890752.stgit@dwillia2-desk3.amr.corp.intel.com
    Signed-off-by: Dan Williams <dan.j.williams@intel.com>


Regards,
Terry