From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F27D38CFE9 for ; Wed, 13 May 2026 18:31:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778697121; cv=none; b=gfjRqn41SHYV69oPEVyfaUqNDdkSrFMBkKJeJYSjLa6AIT3XUxxH2Lotbn0lo0HsTgOarlj8hzGd83E7M5jhIcyhRVkqjbCHJEYDP6sloCFPc6QWmSOXb/3m4kbKA6wssJb2Bsrn3+9aHpn3U5dRSko1y1S+P/EN+ZeKwZOrxxU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778697121; c=relaxed/simple; bh=5zuMicrbKv7tbkgdAMYBulTkYl+ThBnkc91/s1IpOLI=; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:Content-Type; b=i3eu8OgCzrNvUydOnWGozyd5JquVDi6xCwbsfl1nDZl1inwf2qKgfj6lABQhLXwbW/3TpGyZvM+bY5T8Gt+6TJLXmxfyjfLJnb/BsinTokptdHeqGTwiWCVJd2/rSA0vc1jiFGPYHlu+cH1nVEvB4rct/uUAFAg+iB+bHa9Hr4o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=dixB42Lb; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="dixB42Lb" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 996EF26E1D; Wed, 13 May 2026 20:31:57 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id 7O1FRNMsdu1I; Wed, 13 May 2026 20:31:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1778697117; bh=5zuMicrbKv7tbkgdAMYBulTkYl+ThBnkc91/s1IpOLI=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=dixB42LbwVe/eoLAFfatsyPJWMVS50LjZl6TfrNuqMNvP7Gw3oJ49hXId7raZtr/j d8/3DbnwbWwztCp6oy8OE2BRlpmvAC3GyHDI+aHwvcOH6dRiJthVj/+SlLnWDqs3Gd VxOus34YMr5XkiA1AQuIFpYuoBO6Zhz4HFr8VbnUinh+a2RWuHoAHHfeABGYI4cz1T KlEnQyKvAXz71a4Xpt50xXQyKsfLPStSnukutoZhD+LPw6Jvpiq4AC+8YDnF9EUPeC 1XARJkuazswlUpl1NCWGNy26W3HrxA949xSxNhfkMhOADJrN6VByIMQQreagRMQ7RB ENWaF4Mga1yVQ== Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Wed, 13 May 2026 18:31:56 +0000 From: Rustam Adilov To: Daniel Lezcano , Thomas Gleixner , linux-kernel@vger.kernel.org Cc: Chris Packham Subject: Re: [PATCH] clocksource: rtl-otto: Change driver to use __raw reads and writes In-Reply-To: <20260511131520.98420-1-adilov@disroot.org> References: <20260511131520.98420-1-adilov@disroot.org> Message-ID: <4536f1b3a66411a36ca0d01538003fd4@disroot.org> X-Sender: adilov@disroot.org Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On 2026-05-11 13:15, Rustam Adilov wrote: > As it stands, the driver uses ioread32 and iowrite32 for register > access and it works fine. However this stops working when the > SWAP_IO_SPACE config is enabled as this drivers expects ioread32 and > iowrite32 to be in native endian (that is big endian for currently > supported SoCs). RTL9607C is a big endian MIPS SoC that has identical > timer as the already supported chips but needs to have SWAP_IO_SPACE > to have a functioning little endian USB host. > > Fix this by replacing all instances of ioread32 and iowrite32 with > __raw_readl and __raw_writel variants. Since they essentially do > the same register access, this shouldn't affect anything on other > machines. > > Signed-off-by: Rustam Adilov > --- > drivers/clocksource/timer-rtl-otto.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/clocksource/timer-rtl-otto.c b/drivers/clocksource/timer-rtl-otto.c > index 6113d2fdd4de..bcb449ef0481 100644 > --- a/drivers/clocksource/timer-rtl-otto.c > +++ b/drivers/clocksource/timer-rtl-otto.c > @@ -56,37 +56,37 @@ struct rttm_cs { > /* Simple internal register functions */ > static inline unsigned int rttm_get_counter(void __iomem *base) > { > - return ioread32(base + RTTM_CNT); > + return __raw_readl(base + RTTM_CNT); > } > > static inline void rttm_set_period(void __iomem *base, unsigned int period) > { > - iowrite32(period, base + RTTM_DATA); > + __raw_writel(period, base + RTTM_DATA); > } > > static inline void rttm_disable_timer(void __iomem *base) > { > - iowrite32(0, base + RTTM_CTRL); > + __raw_writel(0, base + RTTM_CTRL); > } > > static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor) > { > - iowrite32(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL); > + __raw_writel(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL); > } > > static inline void rttm_ack_irq(void __iomem *base) > { > - iowrite32(ioread32(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT); > + __raw_writel(__raw_readl(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT); > } > > static inline void rttm_enable_irq(void __iomem *base) > { > - iowrite32(RTTM_INT_ENABLE, base + RTTM_INT); > + __raw_writel(RTTM_INT_ENABLE, base + RTTM_INT); > } > > static inline void rttm_disable_irq(void __iomem *base) > { > - iowrite32(0, base + RTTM_INT); > + __raw_writel(0, base + RTTM_INT); > } > > /* Aggregated control functions for kernel clock framework */ It appears the get_maintainer.pl script didn't catch the Chris Packham, presumably because i didn't touch the device bindings file. Added them to CC for review.